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Binary operations

Operations that work in Binary or individual Bits

1 AND

2 BIT

3 EOR - Exclusive OR

4 ORA - OR Accumulator with memory

5 Rotate Bits

6 TRB & TSB

1 - AND

And Accumulator with Memory

AND performs a logical And of the value in the accumulator with that of the memory location with the result stored in the accumulator.

The result will be each bit in the accumulator will be set ONLY if that same bit was set in the original accumulator value and the memory. If the bits were different then the resultant bit will be 0.

AND truth table

First Operand		1
	0	0
	1	1

For 8-bit processors n has the value of bit 7 and v the value of bit 6 of the memory location.

For 16-bit processors, when m=0, n has the value of bit 15 and v the value of bit 14 of the memory location.

Second it performs a logical AND of the memory and the accumulator. If the result is zero the z flag is set.

In both operations, the contents of the accumulator and memory are not modified.

Flags Affected

Flags

Set if most significant bit of result is set

Set if result is zero, otherwise clear

Instructions

Syntax	Opcode	Available on:			# of	# of	Addressing Mode
Syntax	(hex)	6502	65C02	65816	bytes	cycles	Addressing Mode
AND #const	29	x	x	x	2¹	2²	Immediate
AND addr	2D	x	x	x	3	4²	Absolute
AND long	2F			x	4	5²	Absolute Long
AND dp	25	x	x	x	2	3^{2, 3}	Direct Page
AND (dp)	32		x	x	2	5^{2, 3}	Direct Page Indirect
AND [dp]	27			x	2	6^{2, 3}	Direct Page Indirect Long
AND addr,X	3D	x	x	x	3	4^{2, 4}	Absolute Indexed X
AND long,X	3F			x	4	5²	Absolute Long Indexed X
AND addr,Y	39	x	x	x	3	4^{2, 4}	Absolute Indexed Y
AND dp,X	35	x	x	x	2	4^{2, 3}	Direct Page Indexed X
AND (dp,X)	21	x	x	x	2	6^{2, 3}	Direct Page Indexed Indirect X
AND (dp),Y	31	x	x	x	2	5^{2, 3, 4}	Direct Page Indirect Indexed Y
AND [dp],Y	37			x	2	6^{2, 3}	Direct Page Indirect Long Indexed Y
AND sr,S	23			x	2	4²	Stack Relative
AND (sr,S),Y	33			x	2	7²	Stack Relative Indirect Indexed Y

Notes:

65816: Add 1 byte if m=0 (16-bit memory/accumulator)
65816: Add 1 cycle if m=0 (16-bit memory/accumulator)
65816: Add 1 cycle if low byte of Direct Page register is not 0
Add 1 cycle if adding index crosses a page boundary

2 - BIT

Test Memory Bits against Accumulator

Bit is a dual-purpose instruction which performs operations against the accumulator and memory. It is usually used immediately preceding a conditional branch instruction

First it set's the n flag to reflect the value of the high bit of the data in memory and the v flag to the next-to-highest bit of that data.

For 8-bit processors n has the value of bit 7 and v the value of bit 6 of the memory location.

For 16-bit processors, when m=0, n has the value of bit 15 and v the value of bit 14 of the memory location.

Second it performs a logical AND of the memory and the accumulator. If the result is zero the z flag is set.

In both operations, the contents of the accumulator and memory are not modified.

Flags Affected

Flags

Takes value of most significant bit of memory data, not in immediate addressing

Takes value of the next-to-highest bit of memory data, not in immediate addressing

Set if logical AND of memory & accumulator is zero, otherwise clear

Instructions

Syntax	Opcode	Available on:			# of	# of	Addressing Mode
Syntax	(hex)	6502	65C02	65816	bytes	cycles	Addressing Mode
BIT #const	89		x	x	2¹	2²	Immediate
BIT addr	2C	x	x	x	3	4²	Absolute
BIT dp	24	x	x	x	2	5^{2, 3}	Direct Page
BIT addr,X	3C		x	x	3	4^{2, 4}	Absolute Indexed X
BIT dp,X	34		x	x	2	4^{2, 3}	Direct Page Indexed X

Notes:

65816: Add 1 byte if m=0 (16-bit memory/accumulator)
658116: Add 1 cycle if m=0 (16-bit memory/accumulator)
65816: Add 1 cycle if low byte of Direct Page register is not 0
Add 1 cycle if adding index crosses a page boundary

3 - EOR - Exclusive OR

Exclusive-OR Accumulator with Memory

EOR performs a bitwise logical Exclusive-OR of the value in the accumulator with that of the memory location with the result stored in the accumulator.

The result will be each bit in the accumulator will be set ONLY if that same bit in the original accumulator value and the memory differ. If the bits were the same then the resultant bit will be 0.

Exclusive OR truth table
		Second Operand
First Operand		0	1
	0	0	1
	1	1	0

For 8-bit processors n has the value of bit 7 and v the value of bit 6 of the memory location.

For 16-bit processors, when m=0, n has the value of bit 15 and v the value of bit 14 of the memory location.

Second it performs a logical AND of the memory and the accumulator. If the result is zero the z flag is set.

In both operations, the contents of the accumulator and memory are not modified.

Flags Affected

Flags

Set if most significant bit of result is set

Set if result is zero, otherwise clear

Instructions

Syntax	Opcode	Available on:			# of	# of	Addressing Mode
Syntax	(hex)	6502	65C02	65816	bytes	cycles	Addressing Mode
EOR #const	49	x	x	x	2¹	2²	Immediate
EOR addr	4D	x	x	x	3	4²	Absolute
EOR long	4F			x	4	5²	Absolute Long
EOR dp	45	x	x	x	2	3^{2, 3}	Direct Page
EOR (dp)	52		x	x	2	5^{2, 3}	Direct Page Indirect
EOR [dp]	47			x	2	6^{2, 3}	Direct Page Indirect Long
EOR addr,X	5D	x	x	x	3	4^{2, 4}	Absolute Indexed X
EOR long,X	5F			x	4	5²	Absolute Long Indexed X
EOR addr,Y	59	x	x	x	3	4^{2, 4}	Absolute Indexed Y
EOR dp,X	55	x	x	x	2	4^{2, 3}	Direct Page Indexed X
EOR (dp,X)	41	x	x	x	2	6^{2, 3}	Direct Page Indexed Indirect X
EOR (dp),Y	51	x	x	x	2	5^{2, 3, 4}	Direct Page Indirect Indexed Y
EOR [dp],Y	57			x	2	6^{2, 3}	Direct Page Indirect Long Indexed Y
EOR sr,S	43			x	2	4²	Stack Relative
EOR (sr,S),Y	53			x	2	7²	Stack Relative Indirect Indexed Y

Notes:

65816: Add 1 byte if m=0 (16-bit memory/accumulator)
65816: Add 1 cycle if m=0 (16-bit memory/accumulator)
65816: Add 1 cycle if low byte of Direct Page register is not 0
Add 1 cycle if adding index crosses a page boundary

4 - ORA - OR Accumulator with memory

OR Accumulator with Memory

ORA performs a bitwise logical OR of the value in the accumulator with that of the memory location with the result stored in the accumulator.

The result will be each bit in the accumulator will be set if either the same bit in the original accumulator value and the memory are set.

OR truth table
		Second Operand
First Operand		0	1
	0	0	1
	1	1	1

For 8-bit processors n has the value of bit 7 and v the value of bit 6 of the memory location.

For 16-bit processors, when m=0, n has the value of bit 15 and v the value of bit 14 of the memory location.

Second it performs a logical AND of the memory and the accumulator. If the result is zero the z flag is set.

In both operations, the contents of the accumulator and memory are not modified.

Flags Affected

Flags

Set if most significant bit of result is set

Set if result is zero, otherwise clear

Instructions

Syntax	Opcode	Available on:			# of	# of	Addressing Mode
Syntax	(hex)	6502	65C02	65816	bytes	cycles	Addressing Mode
ORA #const	09	x	x	x	2¹	2²	Immediate
ORA addr	0D	x	x	x	3	4²	Absolute
ORA long	0F			x	4	5²	Absolute Long
ORA dp	05	x	x	x	2	3^{2, 3}	Direct Page
ORA (dp)	12		x	x	2	5^{2, 3}	Direct Page Indirect
ORA [dp]	07			x	2	6^{2, 3}	Direct Page Indirect Long
ORA addr,X	1D	x	x	x	3	4^{2, 4}	Absolute Indexed X
ORA long,X	1F			x	4	5²	Absolute Long Indexed X
ORA addr,Y	19	x	x	x	3	4^{2, 4}	Absolute Indexed Y
ORA dp,X	15	x	x	x	2	4^{2, 3}	Direct Page Indexed X
ORA (dp,X)	01	x	x	x	2	6^{2, 3}	Direct Page Indexed Indirect X
ORA (dp),Y	11	x	x	x	2	5^{2, 3, 4}	Direct Page Indirect Indexed Y
ORA [dp],Y	17			x	2	6^{2, 3}	Direct Page Indirect Long Indexed Y
ORA sr,S	03			x	2	4²	Stack Relative
ORA (sr,S),Y	13			x	2	7²	Stack Relative Indirect Indexed Y

Notes:

65816: Add 1 byte if m=0 (16-bit memory/accumulator)
65816: Add 1 cycle if m=0 (16-bit memory/accumulator)
65816: Add 1 cycle if low byte of Direct Page register is not 0
Add 1 cycle if adding index crosses a page boundary

5 - Rotate Bits

Test Memory Bits against Accumulator

The rotate instructions shifts the contents of the accumulator or memory location one bit either to the left or right.

The ROL & ROR instructions will shift in the carry flag into the value. The ASL & LSR instructions shift in 0. The carry flag is set to the bit that was shifted out of the value.

On all processors the data shifted is 8 bits.

On the 65816 with m=0, the data shifted is 16 bits.

Effect on memory for 8 bit operations.
Operation	Opcode
Shift left	ASL	C	0
Shift left with carry	ROL	C	C
Shift right	LSR	0	C
Shift right with carry	ROR	C	C

ASL - Shift Memory or Accumulator Left

Shift the value left one bit. The left most bit is transferred into the carry flag. The right most bit is cleared.

The arithmetic result of the operation is an unsigned multiplication by two.

LSR - Logical Shift Memory or Accumulator Right

Shift the value right one bit. The right most bit is transferred into the carry flag. The left most bit is cleared.

The arithmetic result of the operation is an unsigned division by two.

ROL - Rotate Memory or Accumulator Left

Shift the value left one bit. The right most bit is set to the initial value of the carry flag. The left most bit is transferred into the carry flag.

ROR - Rotate Memory or Accumulator Right

Shift the value right one bit. The left most bit is set to the initial value of the carry flag. The right most bit is transferred into the carry flag.

Multi-word shifts

These instructions can be combined to handle multiple word values:

Multi-word shift left

To shift left multiple words, use ASL for the first operation then ROL for the subsequent words.

1  ; Shift 16-bit value at &70 left 1 bit.
2  ; This is effectively a multiplication by 2
3  ASL &70 ; Shift left low-order byte
4  ROL &71 ; Shift left high-order byte
5  ; Carry will be set if we overflowed
6

For higher precision simply add an additional ROL for the next order byte.

Multi-word shift right

To shift right multiple words, use LSR for the first operation then ROR for the subsequent words. Unlike shifting left, here we have to start with the high-order byte first.

1  ; Shift 16-bit value at &70 right 1 bit.
2  ; This is effectively a division by 2
3  LSR &71 ; Shift right high-order byte
4  ROR &70 ; Shift right low-order byte
5  ; Carry will have the remainder
6

For higher precision just start the LSR on the higher order byte & use ROL for each lower order.

Flags Affected

Flags

Set if the most significant bit of the result is set

Set if the result is zero

The value of the bit shifted out of the result

Instructions

Syntax	Opcode	Available on:			# of	# of	Addressing Mode
Syntax	(hex)	6502	65C02	65816	bytes	cycles	Addressing Mode
ASL A	0A	x	x	x	1	2	Accumulator
ASL addr	0E	x	x	x	3	6	Absolute
ASL dp	06	x	x	x	2	5^{1, 2}	Direct Page
ASL addr,X	1E	x	x	x	3	7^{1, 3}	Absolute Indexed X
ASL dp,X	16	x	x	x	2	6^{1, 2}	Direct Page Indexed X
LSR A	4A	x	x	x	1	2	Accumulator
LSR addr	4E	x	x	x	3	6	Absolute
LSR dp	46	x	x	x	2	5^{1, 2}	Direct Page
LSR addr,X	5E	x	x	x	3	7^{1, 3}	Absolute Indexed X
LSR dp,X	56	x	x	x	2	6^{1, 2}	Direct Page Indexed X
ROL A	2A	x	x	x	1	2	Accumulator
ROL addr	2E	x	x	x	3	6	Absolute
ROL dp	26	x	x	x	2	5^{1, 2}	Direct Page
ROL addr,X	3E	x	x	x	3	7^{1, 3}	Absolute Indexed X
ROL dp,X	36	x	x	x	2	6^{1, 2}	Direct Page Indexed X
ROR A	6A	x	x	x	1	2	Accumulator
ROR addr	6E	x	x	x	3	6	Absolute
ROR dp	66	x	x	x	2	5^{1, 2}	Direct Page
ROR addr,X	7E	x	x	x	3	7^{1, 3}	Absolute Indexed X
ROR dp,X	76	x	x	x	2	6^{1, 2}	Direct Page Indexed X

Notes:

65816: Add 2 cycles if m=0 (16-bit memory/accumulator)
65816: Add 1 cycle if low byte of Direct Page register is not 0
65C02: Subtract 1 cycle if no page boundary is crossed

6 - TRB & TSB

Test & Set/Reset Memory Bits against Accumulator

TRB - Test & Reset memory against Accumulator

TRB logically AND's the complement of the accumulator with the data at an address and stores the result in that address.

This has the effect of clearing each memory bit which is set in the accumulator, leaving the other bits unchanged.

The z flag is set based on a different operation. It's set if the memory location once set logically AND the accumulator (not it's compliment) is zero.

For 8-bit processors or when m=1, the values in the accumulator & memory are 8-bit.

For 16-bit processors, when m=0, the values in the accumulator & memory are 16-bit.

TSB - Test & Set memory against Accumulator

TSB is identical to TRB except it sets the bits defined in the Accumulator not reset them.

Flags Affected

Flags

Set if logical AND of memory & accumulator is zero, otherwise clear

Instructions

Syntax	Opcode	Available on:			# of	# of	Addressing Mode
Syntax	(hex)	6502	65C02	65816	bytes	cycles	Addressing Mode
TRB addr	1C		x	x	3	6¹	Absolute
TRB dp	14		x	x	2	5^{1, 2}	Direct Page
TSB addr	0C		x	x	3	6¹	Absolute
TSB dp	04		x	x	2	5^{1, 2}	Direct Page

Notes:

65816: Add 2 cycles if m=0 (16-bit memory/accumulator)
65816: Add 1 cycle if low byte of Direct Page register is not 0

Binary operations

Table of Contents

1 - AND

Flags Affected

Instructions

Notes:

2 - BIT

Flags Affected

Instructions

Notes:

3 - EOR - Exclusive OR

Flags Affected

Instructions

Notes:

4 - ORA - OR Accumulator with memory

Flags Affected

Instructions

Notes:

5 - Rotate Bits

ASL - Shift Memory or Accumulator Left

LSR - Logical Shift Memory or Accumulator Right

ROL - Rotate Memory or Accumulator Left

ROR - Rotate Memory or Accumulator Right

Multi-word shifts

Multi-word shift left

Multi-word shift right

Flags Affected

Instructions

Notes:

6 - TRB & TSB

TRB - Test & Reset memory against Accumulator

TSB - Test & Set memory against Accumulator

Flags Affected

Instructions

Notes: