Flags

Flag manipulation

The flag instructions manipulate some of the flags in the status register.

CLC - Clear Carry Flag

CLC is used prior to addition with the ADC instruction to keep the carry flag affecting the result.

On the 6502 a CLC before a BCC instruction can be used to implement a branch always, which is relocatable. This is unnecessary since the 65C02 with it's BRA instruction.

On the 16-bit processors a CLC followed by XCE instruction is used to switch the 65802 & 65816 processors into native mode.

SEC - Set Carry Flag

SEC is used prior to subtraction using the SBC instruction to keep the carry flag affecting the result.

On the 16-bit processors a SEC followed by XCE instruction is used to switch the 65802 & 65816 processors into 6502 emulation mode.

CLD - Clear Decimal Mode

CLD is used to switch the processors into binary mode so that the ADC & SBC instructions will perform binary not BCD arithmetic.

SED - Set Decimal Mode

SED is used to switch the processors into decimal mode so that the ADC & SBC instructions will perform BCD not binary arithmetic.

CLI - Clear Interrupt Disable Flag

CLI is used to re-enable hardware interrupts.

When the processor starts the interrupt handler it sets the i flag to prevent another interrupt to occur during that handler. If the handler want's to allow interrupts to happen whilst it's handling a previous one it can use CLI to re-enable them. The handler doesn't need to use CLI as the RTI (ReTurn from Interrupt) instruction will clear the i flag automatically.

In user code, CLI can be used to re-enable interrupts after an SEI instruction. This is usually used during time-critical code or code that cannot be interrupted.

SEI - Clear Interrupt Disable Flag

SEI is used to disable hardware interrupts.

When the i bit is set, maskable hardware interrupts are ignored. When the processor starts the interrupt handler it sets the i flag to prevent another interrupt to occur during that handler. If the handler want's to allow interrupts to happen whilst it's handling a previous one it can use CLI to re-enable them. The handler doesn't need to use CLI as the RTI (ReTurn from Interrupt) instruction will clear the i flag automatically.

In user code, SEI can be used to disable interrupts when it needs to run time-critical code or code that cannot be interrupted. It should then use CLI once it's finished that time-critical code.

CLV - Clear Overflow Flag

CLV clears the overflow flag.

Unlike other clear flag instructions, there is no set overflow flag available. The only way the overflow flag can be set is either:

  • The BIT instruction will set overflow if bit 6 of the mask & memory is set
  • The 65816 REP instruction can clear the overflow
  • Use the Overflow pin on the processor. This is rarely used & is often not even connected.

On the 6502 a CLC before a BVC instruction can be used to implement a branch always, which is relocatable. This is unnecessary since the 65C02 with it's BRA instruction.

REP - Reset Status Bits

For each bit set in the operand byte, reset the corresponding bit in the status register. For each bit not set in the operand byte leaves the corresponding bit unchanged.

This instruction lets you clear any flag or flags in a single instruction. It is the only direct means of resetting the m & x flags.

In 6502 emulation mode (e=1) neither the b flag or bit 5 (the 6502's non-flag bit) is affected by this instruction.

Flags Affected
7 6 5 4 3 2 1 0
6502 emulation mode e=1 n v d i z c
65816 native mode e=0 n v m x d i z c

SEP - Set Status Bits

For each bit set in the operand byte, set the corresponding bit in the status register. For each bit not set in the operand byte leaves the corresponding bit unchanged.

This instruction lets you set any flag or flags in a single instruction. It is the only direct means of setting the m & x flags.

In 6502 emulation mode (e=1) neither the b flag or bit 5 (the 6502's non-flag bit) is affected by this instruction.

The bit's in the operand & their relationship with the status register is the same as the REP instruction.

Instructions
SyntaxActionOpcode Available on: # of # of Addressing Mode
(hex) 6502 65C02 65816 bytes cycles
CLC Clear Carry 18 x x x 1 2 Implied
SEC Set Carry 38 x x x 1 2 Implied
CLD Clear Decimal D8 x x x 1 2 Implied
SED Set Decimal F8 x x x 1 2 Implied
CLI Enable hardware interrupts 58 x x x 1 2 Implied
SEI Disable hardware interrupts 78 x x x 1 2 Implied
CLV Clear Overflow B8 x x x 1 2 Implied
REP #const Reset status bits C2 x 2 3 Immediate
SEP #const Set status bits E2 x 2 3 Immediate

Last modified November 5, 2021: Fix typo (26e9c1f)