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Arithmetic

Arithmetic operations

Table of Contents

1 - ADC Add With Carry

Add With Carry

Adds the data in the operand with the contents of the accumulator. Add 1 to the result if the carry flag is set. Store the final result in the accumulator.

Binary/Decimal mode

If the d flag is clear then binary addition is performed. If the d flag set then Binary Coded Decimal (BCD) addition is performed.

Data size

On all processors, the data added from memory is 8-bit. However, for 16-bit processors with the m flag is clear then the data added is 16-bit with the low-order 8-bits at the effective address and the high-order 8-bits at the effective address plus one.

Multi-precision arithmetic

In multi-precision (multi-word) arithmetic, the carry flag should be cleared before the low-order words are added. The addition will generate a new carry flag value based on that addition which will then be passed on to the next word.

For example, to add 1 to a 16-bit value at &70 on 8-bit processors: 

1  CLC      ; Clear carry before first addition
2  LDA &70  ; Add 1 to low-order byte
3  ADC #1
4  STA &70
5  LDA &71  ; Add 0 to high order byte
6  ADC #0   ; This will add 1 if carry was set
7  STA &71  ; in the low-order byte
Flags Affected
Flags
nv----zc
nSet if most-significant bit of result is set
vSet if signed overflow
zSet if result is zero
cSet if unsigned overflow, clear if valid unsigned result
Instructions
SyntaxOpcode Available on: # of # of Addressing Mode
(hex) 6502 65C02 65816 bytes cycles
ADC #const69 x x x 21 22, 5 Immediate
ADC addr6D x x x 3 42, 5 Absolute
ADC long6F x 4 52, 5 Absolute Long
ADC dp65 x x x 2 32, 3, 5 Direct Page
ADC (dp)72 x x 2 52, 3, 5 Direct Page Indirect
ADC [dp]67 x 2 62, 3, 5 Direct Page Indirect Long
ADC addr,X7D x x x 3 42, 4, 5 Absolute Indexed X
ADC long,X7F x 4 52, 5 Absolute Long Indexed X
ADC addr,Y79 x x x 3 42, 4, 5 Absolute Indexed Y
ADC dp,X75 x x x 2 42, 3, 5 Direct Page Indexed X
ADC (dp,X)61 x x x 2 62, 3, 5 Direct Page Indexed Indirect X
ADC (dp),Y71 x x x 2 52, 3, 4, 5 Direct Page Indirect Indexed Y
ADC [dp],Y77 x 2 62, 3, 5 Direct Page Indirect Long Indexed Y
ADC sr,S63 x 2 42, 5 Stack Relative
ADC (sr,S),Y73 x 2 72, 5 Stack Relative Indirect Indexed Y

Notes:

  1. 65816: Add 1 byte if m=0 (16-bit memory/accumulator)
  2. 65816: Add 1 cycle if m=0 (16-bit memory/accumulator)
  3. 65816: Add 1 cycle if low byte of Direct Page register is not 0
  4. Add 1 cycle if adding index crosses a page boundary
  5. 65C02: Add 1 cycle if d=1

2 - Decrement

Decrement by one a register or a memory location

The decrement instructions add one to either a register or a memory location.

Unlike subtracting 1 with ADC, these instructions does not use the Carry flag in any way. You can test for wraparound only by testing after every decrement to see if the result is zero or negative.

The d flag does not affect these instructions. The decrement is always in binary mode.

For all processors, the decrement is an 8-bit operation unless m=0 on the 65816 in which case the decrement is 16-bit.

DEC - Decrement

Decrement by 1 the contents of the memory location or accumulator.

DEX - Decrement Index Register X

Decrement by 1 the X index register.

DEY - Decrement Index Register Y

Decrement by 1 the Y index register.

Flags Affected
Flags
n-----z-
nSet if most significant bit of the result is set
zSet if result is zero
Instructions
SyntaxOpcode Available on: # of # of Addressing Mode
(hex) 6502 65C02 65816 bytes cycles
DEC A3A x x 1 2 Accumulator
DEC addrCE x x x 3 61 Absolute
DEC dpC6 x x x 2 51, 2 Direct Page
DEC addr,XDE x x x 3 71, 3 Absolute Indexed X
DEC dp,XD6 x x x 2 61, 2 Direct Page Indexed X
DEX CA x x x 1 2 Implied
DEY 88 x x x 1 2 Implied

Notes:

  1. 65816: Add 2 cycles if m=0 (16-bit memory/accumulator)
  2. 65816: Add 1 cycle if low byte of Direct Page register is not 0
  3. 65C02: Subtract 1 cycle if no page boundary is crossed

3 - Increment

Increment by one a register or a memory location

The increment instructions add one to either a register or a memory location.

Unlike adding 1 with ADC, these instructions does not use the Carry flag in any way. You can test for wraparound only by testing after every increment to see if the result is zero or positive.

The d flag does not affect these instructions. The increment is always in binary mode.

For all processors, the increment is an 8-bit operation unless m=0 on the 65816 in which case the increment is 16-bit.

INC - Increment

Increment by 1 the contents of the memory location or accumulator.

INX - Increment Index Register X

Increment by 1 the X index register.

INY - Increment Index Register Y

Increment by 1 the Y index register.

Flags Affected
Flags
n-----z-
nSet if most significant bit of the result is set
zSet if result is zero
Instructions
SyntaxOpcode Available on: # of # of Addressing Mode
(hex) 6502 65C02 65816 bytes cycles
INC A1A x x 1 2 Accumulator
INC addrEE x x x 3 61 Absolute
INC dpE6 x x x 2 51, 2 Direct Page
INY addr,XFE x x x 3 71, 3 Absolute Indexed X
INC dp,XF6 x x x 2 61, 2 Direct Page Indexed X
INX E8 x x x 1 2 Implied
INY C8 x x x 1 2 Implied

Notes:

  1. 65816: Add 2 cycles if m=0 (16-bit memory/accumulator)
  2. 65816: Add 1 cycle if low byte of Direct Page register is not 0
  3. 65C02: Subtract 1 cycle if no page boundary is crossed

4 - SBC Subtract with Borrow from Accumulator

Subtract with Borrow

Subtracts the data in the operand with the contents of the accumulator. Subtract 1 from the result if the carry flag is clear. Store the final result in the accumulator.

Binary/Decimal mode

If the d flag is clear then binary subtraction is performed. If the d flag set then Binary Coded Decimal (BCD) subtraction is performed.

Data size

On all processors, the data subtracted from memory is 8-bit. However, for 16-bit processors with the m flag is clear then the data subtracted is 16-bit with the low-order 8-bits at the effective address and the high-order 8-bits at the effective address plus one.

Multi-precision arithmetic

In multi-precision (multi-word) arithmetic, the carry flag should be set before the low-order words are subtracted. The subtraction will generate a new carry flag value based on that subtraction which will then be passed on to the next word.

For example, to subtract 1 from a 16-bit value at &70 on 8-bit processors: 

1  SEC      ; Set carry before first subtraction
2  LDA &70  ; Subtract 1 from low-order byte
3  SBC #1
4  STA &70
5  LDA &71  ; Subtract 0 to high order byte
6  SBC #0   ; This will subtract 1 if carry was clear
7  STA &71  ; from the low-order byte
Flags Affected
Flags
nv----zc
nSet if most-significant bit of result is set
vSet if signed overflow
zSet if result is zero
cSet if unsigned borrow not required, clear if required
Instructions
SyntaxOpcode Available on: # of # of Addressing Mode
(hex) 6502 65C02 65816 bytes cycles
SBC #constE9 x x x 21 22, 5 Immediate
SBC addrED x x x 3 42, 5 Absolute
SBC longEF x 4 52, 5 Absolute Long
SBC dpE5 x x x 2 32, 3, 5 Direct Page
SBC (dp)F2 x x 2 52, 3, 5 Direct Page Indirect
SBC [dp]E7 x 2 62, 3, 5 Direct Page Indirect Long
SBC addr,XFD x x x 3 42, 4, 5 Absolute Indexed X
SBC long,XFF x 4 52, 5 Absolute Long Indexed X
SBC addr,YF9 x x x 3 42, 4, 5 Absolute Indexed Y
SBC dp,XF5 x x x 2 42, 3, 5 Direct Page Indexed X
SBC (dp,X)E1 x x x 2 62, 3, 5 Direct Page Indexed Indirect X
SBC (dp),YF1 x x x 2 52, 3, 4, 5 Direct Page Indirect Indexed Y
SBC [dp],YF7 x 2 62, 3, 5 Direct Page Indirect Long Indexed Y
SBC sr,SE3 x 2 42, 5 Stack Relative
SBC (sr,S),YF3 x 2 72, 5 Stack Relative Indirect Indexed Y

Notes:

  1. 65816: Add 1 byte if m=0 (16-bit memory/accumulator)
  2. 65816: Add 1 cycle if m=0 (16-bit memory/accumulator)
  3. 65816: Add 1 cycle if low byte of Direct Page register is not 0
  4. Add 1 cycle if adding index crosses a page boundary
  5. 65C02: Add 1 cycle if d=1