LDY

Load Index Register Y from Memory

Load index register Y with data from memory.

On all processors, the data loaded from memory is 8-bit. However, for 16-bit processors with the m flag is clear then the data added is 16-bit with the low-order 8-bits at the effective address and the high-order 8-bits at the effective address plus one.

Flags Affected
Flags
n-----z-
nSet if most-significant bit of result is set
zSet if result is zero
Instructions
SyntaxOpcode Available on: # of # of Addressing Mode
(hex) 6502 65C02 65816 bytes cycles
LDY #constA0 x x x 21 22 Immediate
LDY addrAC x x x 3 42 Absolute
LDY dpA4 x x x 2 32, 3 Direct Page
LDY addr,XBC x x x 3 42, 4 Absolute Indexed X
LDY dp,XB4 x x x 2 42, 3 Direct Page Indexed X

Notes:

  1. 65816: Add 1 byte if m=0 (16-bit memory/accumulator)
  2. 65816: Add 1 cycle if m=0 (16-bit memory/accumulator)
  3. 65816: Add 1 cycle if low byte of Direct Page register is not 0
  4. Add 1 cycle if adding index crosses a page boundary

Last modified November 5, 2021: Add instruction categories (6b74ff9)