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Arithmetic

Arithmetic operations

Table of Contents

1 - ABCD Add Decimal with Extend

ABCD Add Decimal with Extend

Adds the source operand to the destination operand along with the extend bit, and stores the result in the destination location. The addition is performed using binary-coded decimal arithmetic. The operands, which are packed binary-coded decimal numbers, can be addressed in two different ways:

Data Register to Data Register
The operands are contained in the data registers specified in the instruction
Memory to Memory
The operands are addressed with the predecrement addressing mode using the address registers specified in the instruction.

This operation is a byte operation only.

Operation:ABCD
Syntax:
ABCD Dy, Dx
ABCD -(Ay), -(Ax)
Data Size:
Byte
Flags:
XNZVC
*U*U*
X Set the same as the carry bit
N Undefined
Z Cleared if the result is nonzero; unchanged otherwise
V Undefined
C Set if a decimal carry was generated; cleared otherwise
Normally, the Z condition code bit is set via programming before the start of an operation. This allows successful tests for zero results upon completion of multiple-precision operations.
Format:
15141312111098 76543210
1100Rx10000R/MRy

Rx the source register.

Ry the destination register.

R/M Specifies the operand addressing mode:

R/MOperation
0Uses data registers
1Uses address registers or memory

2 - ADD

Adds the source operand to the destination operand using binary addition and stores the result in the destination location. The size of the operation may be specified as byte, word, or long. The mode of the instruction indicates which operand is the source and which is the destination, as well as the operand size.

Operation:ADD
Syntax:
ADD ea, Dn
ADD Dn, ea
Data Size:
Byte
Word
Long
Flags:
XNZVC
*****
X Set the same as the carry bit
N Set if the result is negative; cleared otherwise
Z Cleared if the result is nonzero; set if zero
V Set if an overflow occurs; cleared otherwise
C Set if a carry is generated; cleared otherwise
Format:
15141312111098 76543210
1101RegisterOp ModeEffective Address
Dir SizeMode Register

Op Mode:

DirOperation
0\( ea + D_n \longrightarrow D_n \)
1\( D_n + ea \longrightarrow ea \)
SizeOperation
00Byte
01Word
10Long

Op Mode
Dir Operation Size
0 \( ea + D_n \longrightarrow D_n \) 00 Byte
1 \( D_n + ea \longrightarrow ea \) 01 Word
10 Long
Effective Address— Determines the addressing mode
  1. If the location specified is a source operand, all addressing modes can be used as listed in the following table:
    Addressing Mode Mode Register Addressing Mode Mode Register
    Dn000Dn(xxx).W111000
    An [1]001An(xxx).L111001
    (An)010An#<data>111100
    (An)+011An
    -(An)100An
    (D16,An)101An(D16,PC)111010
    (D8,An,Xn)110An(D8,PC,Xn)111011
    1. Word and long only
  2. If the location specified is a destination operand, only memory alterable addressing modes can be used as listed in the following table:
    Addressing Mode Mode Register Addressing Mode Mode Register
    Dn‐‐(xxx).W111000
    An‐‐(xxx).L111001
    (An)010An#<data>‐‐
    (An)+011An
    -(An)100An
    (D16,An)101An(D16,PC)‐‐
    (D8,An,Xn)110An(D8,PC,Xn)‐‐
Note
  1. The Dn mode is used when the destination is a data register.
  2. The destination ea is invalid for a data register.
  3. ADDA is used when the destination is an address register.
  4. ADDI and ADDQ are used when the source is immediate data.
  5. Most assemblers handle the distinction between ADD, ADDI and ADDQ

3 - ADDX

ADD Extended

Adds the source operand and the extend bit to the destination operand and stores the result in the destination location. The operands can be addressed in two different ways:

Data register to data register
The data registers specified in the instruction contain the operands.
Memory to memory
The address registers specified in the instruction address the operands using the predecrement addressing mode.

The size of the operation can be specified as byte, word, or long.

Operation:ADDX
Syntax:
ADDX Dy, Dx
ADDX -(Ay), -(Ax)
Data Size:
Byte
Word
Long
Flags:
XNZVC
*****
X Set the same as the carry bit
N Set if the result is negative; cleared otherwise
Z Cleared if the result is nonzero; unchanged otherwise
V Set if an overflow occurs; cleared otherwise
C Set if a carry is generated; cleared otherwise
Normally, the Z condition code bit is set via programming before the start of an operation. This allows successful tests for zero results upon completion of multiple-precision operations.
Format:
15141312111098 76543210
1101Rx1Size00R/MRy

Rx the source register.

Ry the destination register.

R/M Specifies the operand addressing mode:

R/MOperation
0Uses data registers
1Uses address registers or memory

Size the size of the operation:

SizeOperation
00Byte
01Word
10Long