Decoding Instructions
How to decode instructions from binary
Table of Contents
This section lists how the instructions are laid out at the bit level.
Normally if you are manually disassembling code you just need to use the
list by Opcodes, however this section will be useful if you are implementing
a Z80 emulator as you can see how the instruction decoding works including how the undocumented instructions work
due to how the bits are organised.
How to use these decoding tables
To decode an opcode, convert it to binary then run through it from left to right, e.g. start at Bit 7 and move
towards Bit 0.
As you run through the bits, start on the table from the top-left and go down then right as you find each bit.
Bits are ordered with 0 first, then 1 & finally x which indicates that bit can be either 0 or 1.
When you find a match then go with that.
If more than one entry matches then go for the one higher in the table as that will have higher precedence.
Z80 Instruction Decode table
To decode an instruction:
Notes:
- Halt 0x76 is where the invalid LD (HL),(HL) instruction would have been.
1 - Arithmetic Instructions
How to decode arithmetic instructions from binary
Opcodes with bits 7…5 set to 100 are the arithmetic instructions
ADD, ADC, SUB and SBC.
As are those starting with 7…6 set to 11 but ending with bits 2…0 set to 110.
These instructions take an additional numeric operand after the opcode and use that instead of a register as
the source.
Those with 7…5 set to 101 are the logic instructions
AND, XOR, OR and CP.
Opcode format| 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|
| |
| Arithmetic with register as source, e.g. ADD A |
| 1 | 0 | 0 | A | F | r |
| |
| Logic with register as source, e.g. OR A |
| 1 | 0 | 1 | A | F | r |
| |
| 8 bit number as source, e.g. SUB 5 |
| 1 | 1 | X | A | F | 1 | 1 | 0 |
| n |
Registers
| Register | r |
|---|
| B | 000 |
| C | 001 |
| D | 010 |
| E | 011 |
| H | 100 |
| L | 101 |
| A | 111 |
2 - Program Flow Instructions
How to decode program flow instructions from binary
Opcode format| 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|
| 0 | 0 | 0 | 1 | D | 0 | 0 | 0 |
| e-2 |
| |
| 0 | 0 | 1 | cc | 0 | 0 | 0 | JR |
| e-2 |
| |
| 1 | 1 | 0 | 0 | 0 | 0 | 1 | 1 | JP |
| 7 | nn | 0 |
| 15 | 8 |
| |
| 1 | 1 | 0 | 0 | 1 | 0 | 0 | 1 | RET |
| |
| 1 | 1 | 0 | 0 | 1 | 1 | 0 | 1 | CALL |
| 7 | nn | 0 |
| 15 | 8 |
| |
| 1 | 1 | 1 | 0 | 1 | 0 | 0 | 1 | JP (HL) |
| |
| 1 | 1 | ccc | 0 | 0 | 0 | RET |
| |
| 1 | 1 | ccc | 0 | 1 | 0 | JP |
| 7 | nn | 0 |
| 15 | 8 |
| |
| 1 | 1 | ccc | 1 | 0 | 0 | CALL |
| 7 | nn | 0 |
| 15 | 8 |
| |
| 1 | 1 | b | 1 | 1 | 1 | RST |
Conditions
| cc | ccc | Abbrev |
Condition |
Flag |
|---|
| 00 | 000 | NZ |
Non Zero |
Z |
| 01 | 001 | Z |
Zero |
| 10 | 010 | NC |
No Carry |
C |
| 11 | 011 | C |
Carry |
| | 100 |
PO |
Parity Odd |
P/V |
| 101 |
PE |
Parity Even |
| 110 |
P |
Sign Positive |
S |
| 111 |
M |
Sign Negative |
Bits
| Value | b |
| 0 | 000 |
| 1 | 001 |
| 2 | 010 |
| 3 | 011 |
| 4 | 100 |
| 5 | 101 |
| 6 | 110 |
| 7 | 111 |
3 - Increment Decrement Instructions
How to decode increment and decrement instructions from binary
Opcode format| 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|
| |
| 0 | 0 | X | X | D | 0 | 1 | 1 | 16-bit |
| |
| 0 | 0 | r | 1 | 0 | D | 8-bit |
| |
| (IX+d) or (IY+d) |
| 1 | 1 | Z | 1 | 1 | 1 | 0 | 1 | DD or FD prefix |
| 0 | 0 | 1 | 1 | 0 | 1 | 0 | D |
| d |
| |
| IX or IY |
| 1 | 1 | Z | 1 | 1 | 1 | 0 | 1 | DD or FD prefix |
| 0 | 0 | 1 | 0 | D | 0 | 1 | 1 |
| 7 | nn | 0 |
| 15 | 8 |
Registers
| Register | r |
|---|
| B | 000 |
| C | 001 |
| D | 010 |
| E | 011 |
| H | 100 |
| L | 101 |
| A | 111 |
XX Register
| Instruction | XX |
|---|
| BC | 00 |
| DE | 01 |
| HL | 10 |
| A | 11 |
D direction
| Direction | D |
|---|
| INC | 0 |
| DEC | 1 |
4 - LD Load instructions
How to decode ld instructions from binary
Opcode format| 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|
| |
| Set 1 |
| 0 | 0 | 0 | B | 0 | 1 | 0 |
| |
| Set 4 |
| 0 | 0 | B | 0 | 0 | 0 | 1 |
| |
| Set 2 |
| 0 | 0 | 1 | B | 0 | 1 | 0 |
| 7 | nn | 0 |
| 15 | 8 |
| |
| Set 3 |
| 0 | 0 | b | 1 | 1 | 0 |
| n |
| |
| LD r, r' |
| 0 | 1 | r | r' |
| |
| LD r, (HL) |
| 0 | 1 | r | 1 | 1 | 0 |
| |
| LD SP,HL |
| 1 | 1 | 1 | 1 | 1 | 0 | 0 | 1 |
Registers
| Register | r |
|---|
| B | 000 |
| C | 001 |
| D | 010 |
| E | 011 |
| H | 100 |
| L | 101 |
| A | 111 |
Bits
| Value | b | B |
| 0 | 000 | 00 |
| 1 | 001 | 01 |
| 2 | 010 | 10 |
| 3 | 011 | 11 |
| 4 | 100 |
| 5 | 101 |
| 6 | 110 |
| 7 | 111 |
Set 1 store a in memory
| 4 | 3 | Instruction |
|---|
| 0 | 0 |
LD (BC),A |
| 1 |
LD (DE),A |
| 1 | 0 |
LD A,(BC) |
| 1 |
LD A,(DE) |
Set 2 store in memory
| 5 | 4 | Instruction |
|---|
| 0 | 0 |
LD (nn),HL |
| 1 |
LD (nn),A |
| 1 | 0 |
LD HL,(nn) |
| 1 |
LD A,(nn) |
Set 3 set to constant n
| 4 | 3 | 2 | Instruction |
|---|
| 0 | 0 | 0 |
LD B,n |
| 1 |
LD C,n |
| 1 | 0 |
LD D,n |
| 1 |
LD E,n |
| 1 | 0 | 0 |
LD H,n |
| 1 |
LD L,n |
| 1 | 0 |
LD (HL),n |
| 1 |
LD A,n |
Set 4 set to constant nnn
| 5 | 4 | Instruction |
|---|
| 0 | 0 |
LD BC,nn |
| 1 |
LD DE,nn |
| 1 | 0 |
LD HL,nn |
| 1 |
LD SP,nn |
5 - Miscelaneous Instructions
How to decode IO, EX and Interrupt instructions from binary
Only four rotate instructions are defined in the main opcode set, all the rest
require the CB prefix.
Opcode format| 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|
| |
| IO |
| 1 | 1 | 0 | 1 | D | 0 | 1 | 1 |
| |
| EXX |
| 1 | 1 | 0 | 1 | 1 | 0 | 0 | 1 |
| |
| EX |
| 1 | 1 | 1 | 0 | W | 0 | 1 | 1 |
| |
| Interrupts |
| 1 | 1 | 1 | 1 | E | 0 | 1 | 1 |
D I/O Direction
| Instruction | D |
|---|
| Out | 0 |
| In | 1 |
W EX registers
| Instruction | W |
|---|
| DE_HL | 0 |
| (SP)_HL | 1 |
E Interrupt Enable
| Instruction | E |
|---|
| DI | 0 |
| EI | 1 |
6 - Rotate Instructions
How to decode rotate instructions from binary
Only four rotate instructions are defined in the main opcode set, all the rest
require the CB prefix.
Opcode format| 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|
| 0 | 0 | 0 | F | D | 1 | 1 | 1 |
| |
| 0 | 0 | 0 | 0 | 0 | 1 | 1 | 1 | RLCA |
| 0 | 0 | 0 | 1 | 0 | 1 | 1 | 1 | RLA |
| 0 | 0 | 0 | 0 | 0 | 1 | 1 | 1 | RRCA |
| 0 | 0 | 0 | 1 | 1 | 1 | 1 | 1 | RRA |
F Carry Flag
| Instruction | F |
|---|
| With Carry | 0 |
| Without Carry | 1 |
D Direction
| Instruction | D |
|---|
| Left | 0 |
| Right | 1 |
7 - Decoding CB Prefix
How the CB instruction prefix works
Instructions with the CB prefix consist of instructions that manipulate individual bits in a register or memory.
Operations with IX and IY registers
The operations here which operator on the (HL) register do also support use with the
IX and IY registers with a relative offset.
They are identical to the (HL) operation but with a DD or
FD prefix.
Only instructions with the lower nibble set to 6 or E are documented.
The other opcodes are undocumented.
Undocumented SLL instruction
Op codes CB30…CB37 are undocumented;
but they do perform a shift left operation, placing a 1 in bit 0 and setting the carry flag to the original bit 7.
8 - Decoding ED Prefix
How the ED instruction prefix works
Instructions with the ED prefix consist of instructions that are not used as often as those in the main group.
9 - Decoding DD and FD Prefixes
How the DD and FD instruction prefixes work
Instructions with either the DD or FD prefixes affect those instructions that operate
against the memory addressed by HL,
changing them to use either the IX or IY registers with an offset.
Instructions that refer directly to the HL register will then act directly against either
IX or IY.
For those that refer to (HL), i.e. the memory pointed to by HL
then the instructions use an additional relative offset that's added to either the
IX or IY registers, and are written as
(IX+d) or (IY+d).
Instructions with the DD prefix use the IX register,
whilst the FD prefix uses the IY register.
DDCB and FDCB Prefixes
The DD and FD prefixes extends though the CB prefix as it does for normal instructions.
Just like the CB prefix
The format of the instruction also changes slightly as they change the behaviour of the existing instructions with
the CB prefix.
These instructions are all four bytes long with the third byte consisting of the offset.
For example: The RLC (HL) is encoded as CB06.
With the DD prefix this becomes RLC (IX+d) but the instruction is formatted as
DDCBdd06.
With the FD prefix this becomes RLC (IY+d), formatted as
FDCBdd06.
Note that the offset d is before the final part of the operand, not after as you might expect.
Decoder
All of these have either DD or FD as the previous prefix byte and a displacement immediately after them.