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| 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 | |
|---|---|---|---|---|---|---|---|---|
| \(Z \longleftarrow \overline{r_b}\) | ||||||||
| BIT b, r | ||||||||
| 1 | 1 | 0 | 0 | 1 | 0 | 1 | 1 | CB |
| 0 | 1 | b | r | |||||
| \(Z \longleftarrow \overline{(HL)_b}\) | ||||||||
| BIT b, (HL) | ||||||||
| 1 | 1 | 0 | 0 | 1 | 0 | 1 | 1 | CB |
| 0 | 1 | b | 1 | 1 | 0 | |||
| \(Z \longleftarrow \overline{(IX+d)_b}\) | ||||||||
| BIT b, (IX+d) | ||||||||
| 1 | 1 | 0 | 1 | 1 | 1 | 0 | 1 | DD |
| 1 | 1 | 0 | 0 | 1 | 0 | 1 | 1 | CB |
| d | ||||||||
| 0 | 1 | b | 1 | 1 | 0 | |||
| \(Z \longleftarrow \overline{(IY+d)_b}\) | ||||||||
| BIT b, (IY+d) | ||||||||
| 1 | 1 | 1 | 1 | 1 | 1 | 0 | 1 | FD |
| 1 | 1 | 0 | 0 | 1 | 0 | 1 | 1 | CB |
| d | ||||||||
| 0 | 1 | b | 1 | 1 | 0 | |||
| Register | r |
|---|---|
| B | 000 |
| C | 001 |
| D | 010 |
| E | 011 |
| H | 100 |
| L | 101 |
| A | 111 |
| Value | b | |
|---|---|---|
| 0 | 000 | |
| 1 | 001 | |
| 2 | 010 | |
| 3 | 011 | |
| 4 | 100 | |
| 5 | 101 | |
| 6 | 110 | |
| 7 | 111 | |
Z is set if the specified bit in the source is 0, otherwise it is cleared.
| Flags |
| ||||||||
|---|---|---|---|---|---|---|---|---|---|
| z | set if the specified bit is 0 | ||||||||
| h | set | ||||||||
| n | reset |
| Source | ||||||||||
|---|---|---|---|---|---|---|---|---|---|---|
| A | B | C | D | E | H | L | (HL) | (IX+d) | (IY+d) | |
| BIT 0 |
BIT 0,A
CB4728 |
BIT 0,B
CB4028 |
BIT 0,C
CB4128 |
BIT 0,D
CB4228 |
BIT 0,E
CB4328 |
BIT 0,H
CB4428 |
BIT 0,L
CB4528 |
BIT 0,(HL)
CB46212 |
BIT 0,(IX+d)
DDCBnn46420 |
BIT 0,(IY+d)
FDCBnn46420 |
| BIT 1 |
BIT 1,A
CB4F28 |
BIT 1,B
CB4828 |
BIT 1,C
CB4928 |
BIT 1,D
CB4A28 |
BIT 1,E
CB4B28 |
BIT 1,H
CB4C28 |
BIT 1,L
CB4D28 |
BIT 1,(HL)
CB4E212 |
BIT 1,(IX+d)
DDCBnn4E420 |
BIT 1,(IY+d)
FDCBnn4E420 |
| BIT 2 |
BIT 2,A
CB5728 |
BIT 2,B
CB5028 |
BIT 2,C
CB5128 |
BIT 2,D
CB5228 |
BIT 2,E
CB5328 |
BIT 2,H
CB5428 |
BIT 2,L
CB5528 |
BIT 2,(HL)
CB56212 |
BIT 2,(IX+d)
DDCBnn56420 |
BIT 2,(IY+d)
FDCBnn56420 |
| BIT 3 |
BIT 3,A
CB5F28 |
BIT 3,B
CB5828 |
BIT 3,C
CB5928 |
BIT 3,D
CB5A28 |
BIT 3,E
CB5B28 |
BIT 3,H
CB5C28 |
BIT 3,L
CB5D28 |
BIT 3,(HL)
CB5E212 |
BIT 3,(IX+d)
DDCBnn5E420 |
BIT 3,(IY+d)
FDCBnn5E420 |
| BIT 4 |
BIT 4,A
CB6728 |
BIT 4,B
CB6028 |
BIT 4,C
CB6128 |
BIT 4,D
CB6228 |
BIT 4,E
CB6328 |
BIT 4,H
CB6428 |
BIT 4,L
CB6528 |
BIT 4,(HL)
CB66212 |
BIT 4,(IX+d)
DDCBnn66420 |
BIT 4,(IY+d)
FDCBnn66420 |
| BIT 5 |
BIT 5,A
CB6F28 |
BIT 5,B
CB6828 |
BIT 5,C
CB6928 |
BIT 5,D
CB6A28 |
BIT 5,E
CB6B28 |
BIT 5,H
CB6C28 |
BIT 5,L
CB6D28 |
BIT 5,(HL)
CB6E212 |
BIT 5,(IX+d)
DDCBnn6E420 |
BIT 5,(IY+d)
FDCBnn6E420 |
| BIT 6 |
BIT 6,A
CB7728 |
BIT 6,B
CB7028 |
BIT 6,C
CB7128 |
BIT 6,D
CB7228 |
BIT 6,E
CB7328 |
BIT 6,H
CB7428 |
BIT 6,L
CB7528 |
BIT 6,(HL)
CB76212 |
BIT 6,(IX+d)
DDCBnn76420 |
BIT 6,(IY+d)
FDCBnn76420 |
| BIT 7 |
BIT 7,A
CB7F28 |
BIT 7,B
CB7828 |
BIT 7,C
CB7928 |
BIT 7,D
CB7A28 |
BIT 7,E
CB7B28 |
BIT 7,H
CB7C28 |
BIT 7,L
CB7D28 |
BIT 7,(HL)
CB7E212 |
BIT 7,(IX+d)
DDCBnn7E420 |
BIT 7,(IY+d)
FDCBnn7E420 |
|
Instruction
Opcode hexSize bytesCycle count
| Register | Memory |
| 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 | |
|---|---|---|---|---|---|---|---|---|
| \(r_b \longleftarrow 0\) | ||||||||
| RES b, r | ||||||||
| 1 | 1 | 0 | 0 | 1 | 0 | 1 | 1 | CB |
| 1 | 0 | b | r | |||||
| \((HL)_b \longleftarrow 0\) | ||||||||
| RES b, (HL) | ||||||||
| 1 | 1 | 0 | 0 | 1 | 0 | 1 | 1 | CB |
| 1 | 0 | b | 1 | 1 | 0 | |||
| \((IX+d)_b \longleftarrow 0\) | ||||||||
| RES b, (IX+d) | ||||||||
| 1 | 1 | 0 | 1 | 1 | 1 | 0 | 1 | DD |
| 1 | 1 | 0 | 0 | 1 | 0 | 1 | 1 | CB |
| d | ||||||||
| 1 | 0 | b | 1 | 1 | 0 | |||
| \((IY+d)_b \longleftarrow 0\) | ||||||||
| RES b, (IY+d) | ||||||||
| 1 | 1 | 1 | 1 | 1 | 1 | 0 | 1 | FD |
| 1 | 1 | 0 | 0 | 1 | 0 | 1 | 1 | CB |
| d | ||||||||
| 1 | 0 | b | 1 | 1 | 0 | |||
| Register | r |
|---|---|
| B | 000 |
| C | 001 |
| D | 010 |
| E | 011 |
| H | 100 |
| L | 101 |
| A | 111 |
| Value | b | |
|---|---|---|
| 0 | 000 | |
| 1 | 001 | |
| 2 | 010 | |
| 3 | 011 | |
| 4 | 100 | |
| 5 | 101 | |
| 6 | 110 | |
| 7 | 111 | |
Z is set if the specified bit in the source is 0, otherwise it is cleared.
| None. |
| Source | ||||||||||
|---|---|---|---|---|---|---|---|---|---|---|
| A | B | C | D | E | H | L | (HL) | (IX+d) | (IY+d) | |
| RES 0 |
RES 0,A
CB8728 |
RES 0,B
CB8028 |
RES 0,C
CB8128 |
RES 0,D
CB8228 |
RES 0,E
CB8328 |
RES 0,H
CB8428 |
RES 0,L
CB8528 |
RES 0,(HL)
CB86215 |
RES 0,(IX+d)
DDCBnn86423 |
RES 0,(IY+d)
FDCBnn86423 |
| RES 1 |
RES 1,A
CB8F28 |
RES 1,B
CB8828 |
RES 1,C
CB8928 |
RES 1,D
CB8A28 |
RES 1,E
CB8B28 |
RES 1,H
CB8C28 |
RES 1,L
CB8D28 |
RES 1,(HL)
CB8E215 |
RES 1,(IX+d)
DDCBnn8E423 |
RES 1,(IY+d)
FDCBnn8E423 |
| RES 2 |
RES 2,A
CB9728 |
RES 2,B
CB9028 |
RES 2,C
CB9128 |
RES 2,D
CB9228 |
RES 2,E
CB9328 |
RES 2,H
CB9428 |
RES 2,L
CB9528 |
RES 2,(HL)
CB96215 |
RES 2,(IX+d)
DDCBnn96423 |
RES 2,(IY+d)
FDCBnn96423 |
| RES 3 |
RES 3,A
CB9F28 |
RES 3,B
CB9828 |
RES 3,C
CB9928 |
RES 3,D
CB9A28 |
RES 3,E
CB9B28 |
RES 3,H
CB9C28 |
RES 3,L
CB9D28 |
RES 3,(HL)
CB9E215 |
RES 3,(IX+d)
DDCBnn9E423 |
RES 3,(IY+d)
FDCBnn9E423 |
| RES 4 |
RES 4,A
CBA728 |
RES 4,B
CBA028 |
RES 4,C
CBA128 |
RES 4,D
CBA228 |
RES 4,E
CBA328 |
RES 4,H
CBA428 |
RES 4,L
CBA528 |
RES 4,(HL)
CBA6215 |
RES 4,(IX+d)
DDCBnnA6423 |
RES 4,(IY+d)
FDCBnnA6423 |
| RES 5 |
RES 5,A
CBAF28 |
RES 5,B
CBA828 |
RES 5,C
CBA928 |
RES 5,D
CBAA28 |
RES 5,E
CBAB28 |
RES 5,H
CBAC28 |
RES 5,L
CBAD28 |
RES 5,(HL)
CBAE215 |
RES 5,(IX+d)
DDCBnnAE423 |
RES 5,(IY+d)
FDCBnnAE423 |
| RES 6 |
RES 6,A
CBB728 |
RES 6,B
CBB028 |
RES 6,C
CBB128 |
RES 6,D
CBB228 |
RES 6,E
CBB328 |
RES 6,H
CBB428 |
RES 6,L
CBB528 |
RES 6,(HL)
CBB6215 |
RES 6,(IX+d)
DDCBnnB6423 |
RES 6,(IY+d)
FDCBnnB6423 |
| RES 7 |
RES 7,A
CBBF28 |
RES 7,B
CBB828 |
RES 7,C
CBB928 |
RES 7,D
CBBA28 |
RES 7,E
CBBB28 |
RES 7,H
CBBC28 |
RES 7,L
CBBD28 |
RES 7,(HL)
CBBE215 |
RES 7,(IX+d)
DDCBnnBE423 |
RES 7,(IY+d)
FDCBnnBE423 |
|
Instruction
Opcode hexSize bytesCycle count
| Register | Memory |
| 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 | |
|---|---|---|---|---|---|---|---|---|
| \(r_b \longleftarrow 1\) | ||||||||
| SET b, r | ||||||||
| 1 | 1 | 0 | 0 | 1 | 0 | 1 | 1 | CB |
| 1 | 1 | b | r | |||||
| \((HL)_b \longleftarrow 1\) | ||||||||
| SET b, (HL) | ||||||||
| 1 | 1 | 0 | 0 | 1 | 0 | 1 | 1 | CB |
| 1 | 1 | b | 1 | 1 | 0 | |||
| \((IX+d)_b \longleftarrow 1\) | ||||||||
| SET b, (IX+d) | ||||||||
| 1 | 1 | 0 | 1 | 1 | 1 | 0 | 1 | DD |
| 1 | 1 | 0 | 0 | 1 | 0 | 1 | 1 | CB |
| d | ||||||||
| 1 | 1 | b | 1 | 1 | 0 | |||
| \((IY+d)_b \longleftarrow 1\) | ||||||||
| SET b, (IY+d) | ||||||||
| 1 | 1 | 1 | 1 | 1 | 1 | 0 | 1 | FD |
| 1 | 1 | 0 | 0 | 1 | 0 | 1 | 1 | CB |
| d | ||||||||
| 1 | 1 | b | 1 | 1 | 0 | |||
| Register | r |
|---|---|
| B | 000 |
| C | 001 |
| D | 010 |
| E | 011 |
| H | 100 |
| L | 101 |
| A | 111 |
| Value | b | |
|---|---|---|
| 0 | 000 | |
| 1 | 001 | |
| 2 | 010 | |
| 3 | 011 | |
| 4 | 100 | |
| 5 | 101 | |
| 6 | 110 | |
| 7 | 111 | |
Z is set if the specified bit in the source is 0, otherwise it is cleared.
| None. |
| Source | ||||||||||
|---|---|---|---|---|---|---|---|---|---|---|
| A | B | C | D | E | H | L | (HL) | (IX+d) | (IY+d) | |
| SET 0 |
SET 0,A
CBC728 |
SET 0,B
CBC028 |
SET 0,C
CBC128 |
SET 0,D
CBC228 |
SET 0,E
CBC328 |
SET 0,H
CBC428 |
SET 0,L
CBC528 |
SET 0,(HL)
CBC6215 |
SET 0,(IX+d)
DDCBnnC6423 |
SET 0,(IY+d)
FDCBnnC6423 |
| SET 1 |
SET 1,A
CBCF28 |
SET 1,B
CBC828 |
SET 1,C
CBC928 |
SET 1,D
CBCA28 |
SET 1,E
CBCB28 |
SET 1,H
CBCC28 |
SET 1,L
CBCD28 |
SET 1,(HL)
CBCE215 |
SET 1,(IX+d)
DDCBnnCE423 |
SET 1,(IY+d)
FDCBnnCE423 |
| SET 2 |
SET 2,A
CBD728 |
SET 2,B
CBD028 |
SET 2,C
CBD128 |
SET 2,D
CBD228 |
SET 2,E
CBD328 |
SET 2,H
CBD428 |
SET 2,L
CBD528 |
SET 2,(HL)
CBD6215 |
SET 2,(IX+d)
DDCBnnD6423 |
SET 2,(IY+d)
FDCBnnD6423 |
| SET 3 |
SET 3,A
CBDF28 |
SET 3,B
CBD828 |
SET 3,C
CBD928 |
SET 3,D
CBDA28 |
SET 3,E
CBDB28 |
SET 3,H
CBDC28 |
SET 3,L
CBDD28 |
SET 3,(HL)
CBDE215 |
SET 3,(IX+d)
DDCBnnDE423 |
SET 3,(IY+d)
FDCBnnDE423 |
| SET 4 |
SET 4,A
CBE728 |
SET 4,B
CBE028 |
SET 4,C
CBE128 |
SET 4,D
CBE228 |
SET 4,E
CBE328 |
SET 4,H
CBE428 |
SET 4,L
CBE528 |
SET 4,(HL)
CBE6215 |
SET 4,(IX+d)
DDCBnnE6423 |
SET 4,(IY+d)
FDCBnnE6423 |
| SET 5 |
SET 5,A
CBEF28 |
SET 5,B
CBE828 |
SET 5,C
CBE928 |
SET 5,D
CBEA28 |
SET 5,E
CBEB28 |
SET 5,H
CBEC28 |
SET 5,L
CBED28 |
SET 5,(HL)
CBEE215 |
SET 5,(IX+d)
DDCBnnEE423 |
SET 5,(IY+d)
FDCBnnEE423 |
| SET 6 |
SET 6,A
CBF728 |
SET 6,B
CBF028 |
SET 6,C
CBF128 |
SET 6,D
CBF228 |
SET 6,E
CBF328 |
SET 6,H
CBF428 |
SET 6,L
CBF528 |
SET 6,(HL)
CBF6215 |
SET 6,(IX+d)
DDCBnnF6423 |
SET 6,(IY+d)
FDCBnnF6423 |
| SET 7 |
SET 7,A
CBFF28 |
SET 7,B
CBF828 |
SET 7,C
CBF928 |
SET 7,D
CBFA28 |
SET 7,E
CBFB28 |
SET 7,H
CBFC28 |
SET 7,L
CBFD28 |
SET 7,(HL)
CBFE215 |
SET 7,(IX+d)
DDCBnnFE423 |
SET 7,(IY+d)
FDCBnnFE423 |
|
Instruction
Opcode hexSize bytesCycle count
| Register | Memory |