BIT
Test if a specific bit is set
| 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 | |
|---|---|---|---|---|---|---|---|---|
| \(Z \longleftarrow \overline{r_b}\) | ||||||||
| BIT b, r | ||||||||
| 1 | 1 | 0 | 0 | 1 | 0 | 1 | 1 | CB |
| 0 | 1 | b | r | |||||
| \(Z \longleftarrow \overline{(HL)_b}\) | ||||||||
| BIT b, (HL) | ||||||||
| 1 | 1 | 0 | 0 | 1 | 0 | 1 | 1 | CB |
| 0 | 1 | b | 1 | 1 | 0 | |||
| \(Z \longleftarrow \overline{(IX+d)_b}\) | ||||||||
| BIT b, (IX+d) | ||||||||
| 1 | 1 | 0 | 1 | 1 | 1 | 0 | 1 | DD |
| 1 | 1 | 0 | 0 | 1 | 0 | 1 | 1 | CB |
| d | ||||||||
| 0 | 1 | b | 1 | 1 | 0 | |||
| \(Z \longleftarrow \overline{(IY+d)_b}\) | ||||||||
| BIT b, (IY+d) | ||||||||
| 1 | 1 | 1 | 1 | 1 | 1 | 0 | 1 | FD |
| 1 | 1 | 0 | 0 | 1 | 0 | 1 | 1 | CB |
| d | ||||||||
| 0 | 1 | b | 1 | 1 | 0 | |||
| Register | r |
|---|---|
| B | 000 |
| C | 001 |
| D | 010 |
| E | 011 |
| H | 100 |
| L | 101 |
| A | 111 |
| Value | b | |
|---|---|---|
| 0 | 000 | |
| 1 | 001 | |
| 2 | 010 | |
| 3 | 011 | |
| 4 | 100 | |
| 5 | 101 | |
| 6 | 110 | |
| 7 | 111 | |
Z is set if the specified bit in the source is 0, otherwise it is cleared.
Flags Affected
| Flags |
| ||||||||
|---|---|---|---|---|---|---|---|---|---|
| z | set if the specified bit is 0 | ||||||||
| h | set | ||||||||
| n | reset |
Opcode Matrix
| Source | ||||||||||
|---|---|---|---|---|---|---|---|---|---|---|
| A | B | C | D | E | H | L | (HL) | (IX+d) | (IY+d) | |
| BIT 0 |
BIT 0,A
CB4728 |
BIT 0,B
CB4028 |
BIT 0,C
CB4128 |
BIT 0,D
CB4228 |
BIT 0,E
CB4328 |
BIT 0,H
CB4428 |
BIT 0,L
CB4528 |
BIT 0,(HL)
CB46212 |
BIT 0,(IX+d)
DDCBnn46420 |
BIT 0,(IY+d)
FDCBnn46420 |
| BIT 1 |
BIT 1,A
CB4F28 |
BIT 1,B
CB4828 |
BIT 1,C
CB4928 |
BIT 1,D
CB4A28 |
BIT 1,E
CB4B28 |
BIT 1,H
CB4C28 |
BIT 1,L
CB4D28 |
BIT 1,(HL)
CB4E212 |
BIT 1,(IX+d)
DDCBnn4E420 |
BIT 1,(IY+d)
FDCBnn4E420 |
| BIT 2 |
BIT 2,A
CB5728 |
BIT 2,B
CB5028 |
BIT 2,C
CB5128 |
BIT 2,D
CB5228 |
BIT 2,E
CB5328 |
BIT 2,H
CB5428 |
BIT 2,L
CB5528 |
BIT 2,(HL)
CB56212 |
BIT 2,(IX+d)
DDCBnn56420 |
BIT 2,(IY+d)
FDCBnn56420 |
| BIT 3 |
BIT 3,A
CB5F28 |
BIT 3,B
CB5828 |
BIT 3,C
CB5928 |
BIT 3,D
CB5A28 |
BIT 3,E
CB5B28 |
BIT 3,H
CB5C28 |
BIT 3,L
CB5D28 |
BIT 3,(HL)
CB5E212 |
BIT 3,(IX+d)
DDCBnn5E420 |
BIT 3,(IY+d)
FDCBnn5E420 |
| BIT 4 |
BIT 4,A
CB6728 |
BIT 4,B
CB6028 |
BIT 4,C
CB6128 |
BIT 4,D
CB6228 |
BIT 4,E
CB6328 |
BIT 4,H
CB6428 |
BIT 4,L
CB6528 |
BIT 4,(HL)
CB66212 |
BIT 4,(IX+d)
DDCBnn66420 |
BIT 4,(IY+d)
FDCBnn66420 |
| BIT 5 |
BIT 5,A
CB6F28 |
BIT 5,B
CB6828 |
BIT 5,C
CB6928 |
BIT 5,D
CB6A28 |
BIT 5,E
CB6B28 |
BIT 5,H
CB6C28 |
BIT 5,L
CB6D28 |
BIT 5,(HL)
CB6E212 |
BIT 5,(IX+d)
DDCBnn6E420 |
BIT 5,(IY+d)
FDCBnn6E420 |
| BIT 6 |
BIT 6,A
CB7728 |
BIT 6,B
CB7028 |
BIT 6,C
CB7128 |
BIT 6,D
CB7228 |
BIT 6,E
CB7328 |
BIT 6,H
CB7428 |
BIT 6,L
CB7528 |
BIT 6,(HL)
CB76212 |
BIT 6,(IX+d)
DDCBnn76420 |
BIT 6,(IY+d)
FDCBnn76420 |
| BIT 7 |
BIT 7,A
CB7F28 |
BIT 7,B
CB7828 |
BIT 7,C
CB7928 |
BIT 7,D
CB7A28 |
BIT 7,E
CB7B28 |
BIT 7,H
CB7C28 |
BIT 7,L
CB7D28 |
BIT 7,(HL)
CB7E212 |
BIT 7,(IX+d)
DDCBnn7E420 |
BIT 7,(IY+d)
FDCBnn7E420 |
|
Instruction
Opcode hexSize bytesCycle count
| Register | Memory |
Last modified November 16, 2021: Add flags to bit operations (f00f81d)