SET

Set a specific bit
76543210
 
\(r_b \longleftarrow 1\)
SET b, r
11001011CB
11br
 
\((HL)_b \longleftarrow 1\)
SET b, (HL)
11001011CB
11b110
 
\((IX+d)_b \longleftarrow 1\)
SET b, (IX+d)
11011101DD
11001011CB
d
11b110
 
\((IY+d)_b \longleftarrow 1\)
SET b, (IY+d)
11111101FD
11001011CB
d
11b110
Registers
Registerr
B000
C001
D010
E011
H100
L101
A111
Bits
Valueb
0000
1001
2010
3011
4100
5101
6110
7111

Z is set if the specified bit in the source is 0, otherwise it is cleared.

Flags Affected
None.
Opcode Matrix
Source
ABCDEHL(HL)(IX+d)(IY+d)
SET 0
SET 0,A
CBC728
SET 0,B
CBC028
SET 0,C
CBC128
SET 0,D
CBC228
SET 0,E
CBC328
SET 0,H
CBC428
SET 0,L
CBC528
SET 0,(HL)
CBC6215
SET 0,(IX+d)
DDCBnnC6423
SET 0,(IY+d)
FDCBnnC6423
SET 1
SET 1,A
CBCF28
SET 1,B
CBC828
SET 1,C
CBC928
SET 1,D
CBCA28
SET 1,E
CBCB28
SET 1,H
CBCC28
SET 1,L
CBCD28
SET 1,(HL)
CBCE215
SET 1,(IX+d)
DDCBnnCE423
SET 1,(IY+d)
FDCBnnCE423
SET 2
SET 2,A
CBD728
SET 2,B
CBD028
SET 2,C
CBD128
SET 2,D
CBD228
SET 2,E
CBD328
SET 2,H
CBD428
SET 2,L
CBD528
SET 2,(HL)
CBD6215
SET 2,(IX+d)
DDCBnnD6423
SET 2,(IY+d)
FDCBnnD6423
SET 3
SET 3,A
CBDF28
SET 3,B
CBD828
SET 3,C
CBD928
SET 3,D
CBDA28
SET 3,E
CBDB28
SET 3,H
CBDC28
SET 3,L
CBDD28
SET 3,(HL)
CBDE215
SET 3,(IX+d)
DDCBnnDE423
SET 3,(IY+d)
FDCBnnDE423
SET 4
SET 4,A
CBE728
SET 4,B
CBE028
SET 4,C
CBE128
SET 4,D
CBE228
SET 4,E
CBE328
SET 4,H
CBE428
SET 4,L
CBE528
SET 4,(HL)
CBE6215
SET 4,(IX+d)
DDCBnnE6423
SET 4,(IY+d)
FDCBnnE6423
SET 5
SET 5,A
CBEF28
SET 5,B
CBE828
SET 5,C
CBE928
SET 5,D
CBEA28
SET 5,E
CBEB28
SET 5,H
CBEC28
SET 5,L
CBED28
SET 5,(HL)
CBEE215
SET 5,(IX+d)
DDCBnnEE423
SET 5,(IY+d)
FDCBnnEE423
SET 6
SET 6,A
CBF728
SET 6,B
CBF028
SET 6,C
CBF128
SET 6,D
CBF228
SET 6,E
CBF328
SET 6,H
CBF428
SET 6,L
CBF528
SET 6,(HL)
CBF6215
SET 6,(IX+d)
DDCBnnF6423
SET 6,(IY+d)
FDCBnnF6423
SET 7
SET 7,A
CBFF28
SET 7,B
CBF828
SET 7,C
CBF928
SET 7,D
CBFA28
SET 7,E
CBFB28
SET 7,H
CBFC28
SET 7,L
CBFD28
SET 7,(HL)
CBFE215
SET 7,(IX+d)
DDCBnnFE423
SET 7,(IY+d)
FDCBnnFE423
Opcode Matrix Legend
Instruction Opcode hexSize bytesCycle count
 Register Memory

Last modified November 16, 2021: Add flags to bit operations (f00f81d)