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Jump absolute

Table of Contents

76543210
 
\(PC \longleftarrow nn\)
JP nn
11000011C3
7nn0
158
 
\(\begin{rcases} PC \longleftarrow nn \end{rcases} \text {if } ccc = true\)
11ccc010
7nn0
158
 
\(PC \longleftarrow HL\)
JP (HL)
11101001E9
 
\(PC \longleftarrow IX\)
JP (IX)
11011101DD
11101001E9
 
\(PC \longleftarrow IY\)
JP (IY)
11111101FD
11101001E9
Conditions
cccAbbrev Condition Flag
000NZ Non Zero Z
001Z Zero
010NC No Carry C
011C Carry
100 PO Parity Odd P/V
101 PE Parity Even
110 P Sign Positive S
111 M Sign Negative

Jumps to 16bit registers

Although the instruction JP (HL) looks like it's using indirect addressing, it doesn't. It takes the address in HL as the new PC, so it should be read as if it's JP HL.

The same applies for JP (IX) and JP (IY) - the actual register is used not the value at that address.

Flags Affected
None.
Opcode Matrix
UncondCNCZNZPEPONP
JP nn
JP nn
C3nnnn310
JP C,nn
DAnnnn310
JP NC,nn
D2nnnn310
JP Z,nn
CAnnnn310
JP NZ,nn
C2nnnn310
JP PE,nn
EAnnnn310
JP PO,nn
E2nnnn310
JP N,nn
FAnnnn310
JP P,nn
F2nnnn310
JP (HL)
JP (HL)
E914








JP (IX)
JP (IX)
DDE928








JP (IY)
JP (IY)
FDE928








Opcode Matrix Legend
Instruction Opcode hexSize bytesCycle count
 Flow