| 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 | |
|---|---|---|---|---|---|---|---|---|
| \(r \longleftarrow (C)\) | ||||||||
| IN r, (C) | ||||||||
| 1 | 1 | 1 | 0 | 1 | 1 | 0 | 1 | ED |
| 0 | 1 | r | 0 | 0 | 0 | |||
| \(F \longleftarrow (C)\) | ||||||||
| IN F, (C) | ||||||||
| 1 | 1 | 1 | 0 | 1 | 1 | 0 | 1 | ED |
| 0 | 1 | 1 | 1 | 0 | 0 | 0 | 0 | 70 |
| Register | r |
|---|---|
| B | 000 |
| C | 001 |
| D | 010 |
| E | 011 |
| H | 100 |
| L | 101 |
| A | 111 |
The contents of Register C are placed on the bottom half (A0…7) of the address bus to select the I/O device at one of 256 possible ports. The contents of Register B are placed on the top half (A8…A15) of the address bus at this time. Then one byte from the selected port is placed on the data bus and written to register r in the CPU.
There is an undocumented code where r=%110 which sets the flag register.
This is actually documented in Zilog's Z80 CPU User Manual, 2016 edition Page 296. For this reason it's included on this page and not in the Undocumented instruction section.
Flags Affected
| Flags |
| ||||||||
|---|---|---|---|---|---|---|---|---|---|
| s | set if input data is negative | ||||||||
| z | set if input data is 0 | ||||||||
| h | reset | ||||||||
| p/v | set if parity is even, reset if odd | ||||||||
| n | reset |
Opcode Matrix
| A | B | C | D | E | H | L | F | |
|---|---|---|---|---|---|---|---|---|
| IN (C) |
IN A,(C)
ED7B212 |
IN B,(C)
ED40212 |
IN C,(C)
ED48212 |
IN D,(C)
ED50212 |
IN E,(C)
ED58212 |
IN H,(C)
ED60212 |
IN L,(C)
ED68212 |
IN F,(C)
ED70212 |
|
Instruction
Opcode hexSize bytesCycle count
| Special | Undocumented |