1 - LD (dd), n

Load number into memory

7	6	5	4	3	2	1	0

\((HL) \longleftarrow n\)
LD (HL), n
0	0	1	1	0	1	1	0	36
n

\(( IX + d ) \longleftarrow n\)
LD (IX+d), n
1	1	0	1	1	1	0	1	DD
0	0	1	1	0	1	1	0	36
d
n

\(( IY + d ) \longleftarrow n\)
LD (IY+d), n
1	1	1	1	1	1	0	1	FD
0	0	1	1	0	1	1	0	36
d
n

Flags Affected

None.

Opcode Matrix

	(HL)	(IX+d)	(IY+d)
n	LD (HL), n 36nn210	LD (IX+d), n DD36nnnn419	LD (IY+d), n FD36nnnn419

Opcode Matrix Legend
Instruction Opcode hexSize bytesCycle count		Implicit

2 - LD (dd), s

Store register into memory via register

7	6	5	4	3	2	1	0

\((BC) \longleftarrow A\)
LD (BC), A
0	0	0	0	0	0	1	0	02

\((DE) \longleftarrow A\)
LD (DE), A
0	0	0	1	0	0	1	0	12

\((HL) \longleftarrow r\)
LD (HL), r
0	1	1	1	0	r

\(( IX + d ) \longleftarrow r\)
LD (IX+d), r
1	1	0	1	1	1	0	1	DD
0	1	1	1	0	r
d

\(( IY + d ) \longleftarrow r\)
LD (IY+d), r
1	1	1	1	1	1	0	1	FD
0	1	1	1	0	r
d

Registers
Register	r
B	000
C	001
D	010
E	011
H	100
L	101
A	111

Flags Affected

None.

Opcode Matrix

	A	B	C	D	E	H	L
(HL)	LD (HL), A 7717	LD (HL), B 7017	LD (HL), C 7117	LD (HL), D 7217	LD (HL), E 7317	LD (HL), H 7417	LD (HL), L 7517
(BC)	LD (BC), A 0217
(DE)	LD (DE), A 1217
(IX+d)	LD (IX+d), A DD77nn319	LD (IX+d), B DD70nn319	LD (IX+d), C DD71nn319	LD (IX+d), D DD72nn319	LD (IX+d), E DD73nn319	LD (IX+d), H DD74nn319	LD (IX+d), L DD75nn319
(IY+d)	LD (IY+d), A FD77nn319	LD (IY+d), B FD70nn319	LD (IY+d), C FD71nn319	LD (IY+d), D FD72nn319	LD (IY+d), E FD73nn319	LD (IY+d), H FD74nn319	LD (IY+d), L FD75nn319

Opcode Matrix Legend
Instruction Opcode hexSize bytesCycle count		Memory

3 - LD (nn), s

Store register into memory via address

7	6	5	4	3	2	1	0

\((nn) \longleftarrow A\)
LD (nn), A
0	0	1	1	0	0	1	0	32
7	nn						0
15	nn						8

\((nn+1) \longleftarrow dd_h, (nn) \longleftarrow dd_l\)
LD (nn), dd
1	1	1	0	1	1	0	1	ED
0	1	dd		0	0	1	1
7	nn						0
15	nn						8

\((nn+1) \longleftarrow H, (nn) \longleftarrow L\)
LD (nn), HL
0	0	1	0	0	0	1	0	22
7	nn						0
15	nn						8

\((nn+1) \longleftarrow IX_h, (nn) \longleftarrow IX_l\)
LD (nn), IX
1	1	0	1	1	1	0	1	DD
0	0	1	0	0	0	1	0	22
7	nn						0
15	nn						8

\((nn+1) \longleftarrow IY_h, (nn) \longleftarrow IY_l\)
LD (nn), IY
1	1	1	1	1	1	0	1	FD
0	0	1	0	0	0	1	0	22
7	nn						0
15	nn						8

Registers
Value	dd
00	BC
01	DE
10	HL
11	SP

Flags Affected

None.

Opcode Matrix

	A	BC	DE	HL	IX	IY	SP
(nn)	LD (nn), A 32nnnn313			LD (nn), HL 22nnnn316
(nn)		LD (nn), BC ED43nnnn420	LD (nn), DE ED53nnnn420	LD (nn), HL ED63nnnn420	LD (nn), IX DD22nnnn420	LD (nn), IY FD22nnnn420	LD (nn), SP ED73nnnn420

Opcode Matrix Legend
Instruction Opcode hexSize bytesCycle count		Memory

4 - LD A,I and LDA A,R

8-bit register instructions

7	6	5	4	3	2	1	0

\(A \longleftarrow I\)
LD A, I
1	1	1	0	1	1	0	1	ED
0	1	0	1	0	1	1	1	57

\(A \longleftarrow R\)
LD A, R
1	1	1	0	1	1	0	1	ED
0	1	0	1	1	1	1	1	5F

Flags Affected

Flags

s

z

-

p/v

-

s

Set if the source register is negative

z

Set if the source register is 0

p/v

Contains contents of IFF2,
0 if an interrupt occurs during the instruction running

Opcode Matrix

	I	R
A	LD A, I ED5729	LD A, R ED5F29

Opcode Matrix Legend
Instruction Opcode hexSize bytesCycle count		Special

5 - LD dd, nn

Load 16-bit number

7	6	5	4	3	2	1	0

\(dd \longleftarrow nn\)
LD dd, nn
0	0	dd		0	0	0	1
7	nn						0
15	nn						8

\(IX \longleftarrow nn\)
LD IX, nn
1	1	0	1	1	1	0	1	DD
0	0	1	0	0	0	0	1	21
7	nn						0
15	nn						8

\(IY \longleftarrow nn\)
LD IY, nn
1	1	1	1	1	1	0	1	FD
0	0	1	0	0	0	0	1	21
7	nn						0
15	nn						8

Registers
Value	dd
00	BC
01	DE
10	HL
11	SP

Flags Affected

None.

Opcode Matrix

	BC	DE	HL	IX	IY	SP
nn	LD BC, nn 01nnnn310	LD DE, nn 11nnnn310	LD HL, nn 21nnnn310	LD IX, nn DD21nnnn414	LD IY, nn FD21nnnn414	LD SP, nn 31nnnn310

Opcode Matrix Legend
Instruction Opcode hexSize bytesCycle count		Implicit

6 - LD r, s

8-bit register instructions

7	6	5	4	3	2	1	0

\(r \longleftarrow r'\)
LD r, r'
0	1	r			r'

\(r \longleftarrow n\)
LD r, n
0	0	r			1	1	0
n

\(A \longleftarrow (BC)\)
LD A, (BC)
0	0	0	0	1	0	1	0	0A

\(A \longleftarrow (DE)\)
LD A, (DE)
0	0	0	1	1	0	1	0	1A

\(r \longleftarrow (HL)\)
LD r, (HL)
0	1	r			1	1	0

\(r \longleftarrow (IX+d)\)
LD r, (IX+d)
1	1	0	1	1	1	0	1	DD
0	1	r			1	1	0
d

\(r \longleftarrow (IY+d)\)
LD r, (IY+d)
1	1	1	1	1	1	0	1	FD
0	1	r			1	1	0
d

\(I \longleftarrow A\)

LD I,A
1	1	1	0	1	1	0	1	ED
0	1	0	0	0	1	1	1	47

\(R \longleftarrow A\)
LD R, A
1	1	1	0	1	1	0	1	ED
0	1	0	0	1	1	1	1	4F

Registers
Register	r
B	000
C	001
D	010
E	011
H	100
L	101
A	111

Flags Affected

None.

Opcode Matrix

	A	B	C	D	E	H	L	(HL)	(BC)	(DE)	(IX+d)	(IY+d)	n
A	LD A, A 7F14	LD A, B 7814	LD A, C 7914	LD A, D 7A14	LD A, E 7B14	LD A, H 7C14	LD A, L 7D14	LD A, (HL) 7E17	LD A, (BC) 0A17	LD A, (DE) 1A17	LD A, (IX+d) DD7Enn319	LD A, (IY+d) FD7Enn319	LD A, n 3Enn27
B	LD B, A 4714	LD B, B 4014	LD B, C 4114	LD B, D 4214	LD B, E 4314	LD B, H 4414	LD B, L 4514	LD B, (HL) 4617			LD B, (IX+d) DD46nn319	LD B, (IY+d) FD46nn319	LD B, n 06nn27
C	LD C, A 4F14	LD C, B 4814	LD C, C 4914	LD C, D 4A14	LD C, E 4B14	LD C, H 4C14	LD C, L 4D14	LD C, (HL) 4E17			LD C, (IX+d) DD4Enn319	LD C, (IY+d) FD4Enn319	LD C, n 0Enn27
D	LD D, A 5714	LD D, B 5014	LD D, C 5114	LD D, D 5214	LD D, E 5314	LD D, H 5414	LD D, L 5514	LD D, (HL) 5617			LD D, (IX+d) DD56nn319	LD D, (IY+d) FD56nn319	LD D, n 16nn27
E	LD E, A 5F14	LD E, B 5814	LD E, C 5914	LD E, D 5A14	LD E, E 5B14	LD E, H 5C14	LD E, L 5D14	LD E, (HL) 5E17			LD E, (IX+d) DD5Enn319	LD E, (IY+d) FD5Enn319	LD E, n 1Enn27
H	LD H, A 6714	LD H, B 6014	LD H, C 6114	LD H, D 6214	LD H, E 6314	LD H, H 6414	LD H, L 6514	LD H, (HL) 6617			LD H, (IX+d) DD66nn319	LD H, (IY+d) FD66nn319	LD H, n 26nn27
L	LD L, A 6F14	LD L, B 6814	LD L, C 6914	LD L, D 6A14	LD L, E 6B14	LD L, H 6C14	LD L, L 6D14	LD L, (HL) 6E17			LD L, (IX+d) DD6Enn319	LD L, (IY+d) FD6Enn319	LD L, n 2Enn27
I	LD I, A ED4724
R	LD R, A ED4F24

Opcode Matrix Legend
Instruction Opcode hexSize bytesCycle count		Register		Memory		Implicit		Special

7 - LD s, (nn)

Load register from memory

7	6	5	4	3	2	1	0

\(A \longleftarrow (nn)\)
LD A, (nn)
0	0	1	1	1	0	1	0	3A
7	nn						0
15	nn						8

\(H \longleftarrow (nn+1), L \longleftarrow (nn)\)
LD HL, (nn)
0	0	1	0	1	0	1	0	2A
7	nn						0
15	nn						8

\(dd_h \longleftarrow (nn+1), dd_l \longleftarrow (nn)\)
LD dd, (nn)
1	1	1	0	1	1	0	1	ED
0	1	dd		1	0	1	1
7	nn						0
15	nn						8

\(IX_h \longleftarrow (nn+1), IX_l \longleftarrow (nn)\)
LD IX, (nn)
1	1	0	1	1	1	0	1	DD
0	0	1	0	1	0	1	0	2A
7	nn						0
15	nn						8

\(IY_h \longleftarrow (nn+1), IY_l \longleftarrow (nn)\)
LD IY, (nn)
1	1	1	1	1	1	0	1	FD
0	0	1	0	1	0	1	0	2A
7	nn						0
15	nn						8

Registers
Value	dd
00	BC
01	DE
10	HL
11	SP

Flags Affected

None.

Opcode Matrix

	A	BC	DE	HL	IX	IY	SP
(nn)	LD A, (nn) 3Annnn313			LD HL, (nn) 2Annnn316
(nn)		LD BC, (nn) ED4Bnnnn420	LD DE, (nn) ED5Bnnnn420	LD HL, (nn) ED6Bnnnn420	LD IX, (nn) DD2Annnn420	LD IY, (nn) FD2Annnn420	LD SP, (nn) ED7Bnnnn420

Opcode Matrix Legend
Instruction Opcode hexSize bytesCycle count		Memory

8 - LD SP, s

Set Stack Pointer from register

7	6	5	4	3	2	1	0

\(SP \longleftarrow HL\)
LD SP,HL
1	1	1	1	1	0	0	1	F9

\(SP \longleftarrow IX\)
LD SP, IX
1	1	0	1	1	1	0	1	DD
1	1	1	1	1	0	0	1	F9

\(SP \longleftarrow IY\)
LD SP, IY
1	1	1	1	1	1	0	1	FD
1	1	1	1	1	0	0	1	F9

Flags Affected

None.

Opcode Matrix

	HL	IX	IY
SP	LD SP, HL F916	LD SP, IX DDF926	LD SP, IY FDF926

Opcode Matrix Legend
Instruction Opcode hexSize bytesCycle count		Register

Load

Table of Contents

1 - LD (dd), n

Flags Affected

Opcode Matrix

2 - LD (dd), s

Flags Affected

Opcode Matrix

3 - LD (nn), s

Flags Affected

Opcode Matrix

4 - LD A,I and LDA A,R

Flags Affected

Opcode Matrix

5 - LD dd, nn

Flags Affected

Opcode Matrix

6 - LD r, s

Flags Affected

Opcode Matrix

7 - LD s, (nn)

Flags Affected

Opcode Matrix

8 - LD SP, s

Flags Affected

Opcode Matrix