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The ADD
instruction performs an addition without carry.
Any overflow from the addition will be passed on to the carry flag.
7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
---|---|---|---|---|---|---|---|
\(A \longleftarrow A + r\) | |||||||
ADD A, r | |||||||
1 | 0 | 0 | 0 | 0 | r |
Register | r |
---|---|
B | 000 |
C | 001 |
D | 010 |
E | 011 |
H | 100 |
L | 101 |
A | 111 |
Flags |
| ||||||||
---|---|---|---|---|---|---|---|---|---|
s | set if result negative | ||||||||
z | set if result is 0 | ||||||||
h | set if carry from bit 3 |
A | B | C | D | E | H | L | |
---|---|---|---|---|---|---|---|
A |
ADD A,A
8714 |
ADD A,B
8014 |
ADD A,C
8114 |
ADD A,D
8214 |
ADD A,E
8314 |
ADD A,H
8414 |
ADD A,L
8514 |
Instruction
Opcode hexSize bytesCycle count
| Register |
7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 | |
---|---|---|---|---|---|---|---|---|
\(A \longleftarrow A + n\) | ||||||||
ADD A, n | ||||||||
1 | 1 | 0 | 0 | 0 | 1 | 1 | 0 | C6 |
n |
Flags |
| ||||||||
---|---|---|---|---|---|---|---|---|---|
s | set if result negative | ||||||||
z | set if result is 0 | ||||||||
h | set if carry from bit 3 | ||||||||
p/v | set if overflow | ||||||||
c | set if carry from bit 7 |
n | |
---|---|
A |
ADD A,n
C6nn27 |
Instruction
Opcode hexSize bytesCycle count
| Implicit |
7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 | |
---|---|---|---|---|---|---|---|---|
\(A \longleftarrow A + (HL)\) | ||||||||
ADD A, (HL) | ||||||||
1 | 0 | 0 | 0 | 0 | 1 | 1 | 0 | 86 |
\(A \longleftarrow A + (IX+d)\) | ||||||||
ADD A, (IX+d) | ||||||||
1 | 1 | 0 | 1 | 1 | 1 | 0 | 1 | DD |
1 | 0 | 0 | 0 | 0 | 1 | 1 | 0 | 86 |
d | ||||||||
\(A \longleftarrow A + (IY+d)\) | ||||||||
ADD A, (IY+d) | ||||||||
1 | 1 | 1 | 1 | 1 | 1 | 0 | 1 | FD |
1 | 0 | 0 | 0 | 0 | 1 | 1 | 0 | 86 |
d |
Flags |
| ||||||||
---|---|---|---|---|---|---|---|---|---|
s | set if result negative | ||||||||
z | set if result is 0 | ||||||||
h | set if carry from bit 3 | ||||||||
p/v | set if overflow | ||||||||
c | set if carry from bit 7 |
(HL) | (IX+d) | (IY+d) | |
---|---|---|---|
A |
ADD A,(HL)
8617 |
ADD A,(IX+d)
DD86nn319 |
ADD A,(IY+d)
FD86nn319 |
Instruction
Opcode hexSize bytesCycle count
| Memory |
7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 | |
---|---|---|---|---|---|---|---|---|
\(HL \longleftarrow HL + dd\) | ||||||||
ADD HL, dd | ||||||||
0 | 0 | dd | 1 | 0 | 0 | 1 | ||
\(IX \longleftarrow IX + pp\) | ||||||||
ADD IX, pp | ||||||||
1 | 1 | 0 | 1 | 1 | 1 | 0 | 1 | DD |
0 | 0 | pp | 1 | 0 | 0 | 1 | ||
\(IY \longleftarrow IY + mm\) | ||||||||
ADD IY, mm | ||||||||
1 | 1 | 1 | 1 | 1 | 1 | 0 | 1 | FD |
0 | 0 | mm | 1 | 0 | 0 | 1 |
Value | dd | mm | pp |
---|---|---|---|
00 | BC | BC | BC |
01 | DE | DE | DE |
10 | HL | IY | IX |
11 | SP | SP | SP |
Flags |
| ||||||||
---|---|---|---|---|---|---|---|---|---|
s | set if result negative | ||||||||
z | set if result is 0 | ||||||||
h | set if carry from bit 11 | ||||||||
c | set if carry from bit 15 |
BC | DE | HL | SP | IX | IY | |
---|---|---|---|---|---|---|
HL |
ADD HL,BC
09111 |
ADD HL,DE
19111 |
ADD HL,HL
29111 |
ADD HL,SP
39111 |
|
|
IX |
ADD IX,BC
DD09215 |
ADD IX,DE
DD19215 |
|
ADD IX,SP
DD39215 |
ADD IX,IX
DD29215 |
|
IY |
ADD IY,BC
FD09215 |
ADD IY,DE
FD19215 |
|
ADD IY,SP
FD39215 |
|
ADD IY,IY
FD29215 |
Instruction
Opcode hexSize bytesCycle count
| Register |
The ADC
instruction performs an addition with carry.
If carry is set then it will be included in the calculation whilst any overflow from the addition will be passed on to
the carry flag.
7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 | |
---|---|---|---|---|---|---|---|---|
\(A \longleftarrow A + r + Carry\) | ||||||||
ADC A,r | ||||||||
1 | 0 | 0 | 0 | 1 | r | |||
\(A \longleftarrow A + n + Carry\) | ||||||||
ADC A,n | ||||||||
1 | 1 | 0 | 0 | 1 | 1 | 1 | 0 | CE |
n | ||||||||
\(A \longleftarrow A + (HL) + Carry\) | ||||||||
ADC A, (HL) | ||||||||
1 | 0 | 0 | 0 | 1 | 1 | 1 | 0 | 8E |
\(A \longleftarrow A + (IX+d) + Carry\) | ||||||||
ADC A, (IX + d) | ||||||||
1 | 1 | 0 | 1 | 1 | 1 | 0 | 1 | DD |
1 | 0 | 0 | 0 | 1 | 1 | 1 | 0 | 8E |
d | ||||||||
\(A \longleftarrow A + (IY+d) + Carry\) | ||||||||
ADC A, (IY + d) | ||||||||
1 | 1 | 1 | 1 | 1 | 1 | 0 | 1 | FD |
1 | 0 | 0 | 0 | 1 | 1 | 1 | 0 | 8E |
d |
Register | r |
---|---|
B | 000 |
C | 001 |
D | 010 |
E | 011 |
H | 100 |
L | 101 |
A | 111 |
Flags |
| ||||||||
---|---|---|---|---|---|---|---|---|---|
s | set if result negative | ||||||||
z | set if result is 0 | ||||||||
h | set if carry from bit 3 | ||||||||
p/v | set if overflow | ||||||||
c | set if carry from bit 7 |
A | B | C | D | E | H | L | (HL) | (IX+d) | (IY+d) | n | |
---|---|---|---|---|---|---|---|---|---|---|---|
A |
ADC A,A
8F14 |
ADC A,B
8814 |
ADC A,C
8914 |
ADC A,D
8A14 |
ADC A,E
8B14 |
ADC A,H
8C14 |
ADC A,L
8D14 |
ADC A,(HL)
8E17 |
ADC A,(IX+d)
DD8Enn319 |
ADC A,(IY+d)
FD8Enn319 |
ADC A,n
CEnn27 |
Instruction
Opcode hexSize bytesCycle count
| Register | Memory | Implicit |
7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 | |
---|---|---|---|---|---|---|---|---|
\(HL \longleftarrow HL + ss + Carry\) | ||||||||
ADC HL, dd | ||||||||
1 | 1 | 1 | 0 | 1 | 1 | 0 | 1 | ED |
0 | 1 | dd | 1 | 0 | 1 | 0 |
Value | dd |
---|---|
00 | BC |
01 | DE |
10 | HL |
11 | SP |
Flags |
| ||||||||
---|---|---|---|---|---|---|---|---|---|
s | set if result negative | ||||||||
z | set if result is 0 | ||||||||
h | set if carry from bit 11 | ||||||||
p/v | set if overflow | ||||||||
c | set if carry from bit 15 |
BC | DE | HL | SP | |
---|---|---|---|---|
HL |
ADC HL,BC
ED4A215 |
ADC HL,DE
ED5A215 |
ADC HL,HL
ED6A215 |
ADC HL,SP
ED7A215 |
Instruction
Opcode hexSize bytesCycle count
| Register |
\(A \longleftarrow A - s\)
This s operand is any of r, n, (HL), (IX+d), or (IY+d).
These possible op code/operand combinations are assembled as follows in the object code:
7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 | |
---|---|---|---|---|---|---|---|---|
SUB r | ||||||||
1 | 0 | 0 | 1 | 0 | r | |||
SUB n | ||||||||
1 | 1 | 0 | 1 | 0 | 1 | 1 | 0 | D6 |
n | ||||||||
SUB (HL) | ||||||||
1 | 0 | 0 | 1 | 0 | 1 | 1 | 0 | 96 |
SUB (IX+d) | ||||||||
1 | 1 | 0 | 1 | 1 | 1 | 0 | 1 | DD |
1 | 0 | 0 | 1 | 0 | 1 | 1 | 0 | 96 |
d | ||||||||
SUB (IX+d) | ||||||||
1 | 1 | 1 | 1 | 1 | 1 | 0 | 1 | FD |
1 | 0 | 0 | 1 | 0 | 1 | 1 | 0 | 96 |
d |
Register | r |
---|---|
B | 000 |
C | 001 |
D | 010 |
E | 011 |
H | 100 |
L | 101 |
A | 111 |
Flags |
| ||||||||
---|---|---|---|---|---|---|---|---|---|
s | set if result negative | ||||||||
z | set if result is 0 | ||||||||
h | set if borrow from bit 4 | ||||||||
p/v | set if overflow | ||||||||
c | set if borrow |
A | B | C | D | E | H | L | (HL) | (IX+d) | (IY+d) | n | |
---|---|---|---|---|---|---|---|---|---|---|---|
A |
SUB A,A
9714 |
SUB A,B
9014 |
SUB A,C
9114 |
SUB A,D
9214 |
SUB A,E
9314 |
SUB A,H
9414 |
SUB A,L
9514 |
SUB A,(HL)
9617 |
SUB A,(IX+d)
DD96nn319 |
SUB A,(IY+d)
FD96nn319 |
SUB A,n
D6nn27 |
Instruction
Opcode hexSize bytesCycle count
| Register | Memory | Implicit |
7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 | |
---|---|---|---|---|---|---|---|---|
\(A \longleftarrow A - r - Carry\) | ||||||||
SBC A, r | ||||||||
1 | 0 | 0 | 1 | 1 | r | |||
\(A \longleftarrow A - n - Carry\) | ||||||||
SBC A,n | ||||||||
1 | 1 | 0 | 1 | 1 | 1 | 1 | 0 | DE |
\(A \longleftarrow A - (HL) - Carry\) | ||||||||
SBC A, (HL) | ||||||||
1 | 0 | 0 | 1 | 1 | 1 | 1 | 0 | 9E |
\(A \longleftarrow A - (IX+d) - Carry\) | ||||||||
SBC A, (IX+d) | ||||||||
1 | 1 | 0 | 1 | 1 | 1 | 0 | 1 | DD |
1 | 0 | 0 | 1 | 1 | 1 | 1 | 0 | 9E |
d | ||||||||
\(A \longleftarrow A - (IY+d) - Carry\) | ||||||||
SBC A, (IY+d) | ||||||||
1 | 1 | 1 | 1 | 1 | 1 | 0 | 1 | FD |
1 | 0 | 0 | 1 | 1 | 1 | 1 | 0 | 9E |
d | ||||||||
\(A \longleftarrow A - ss - Carry\) | ||||||||
SBC HL, ss | ||||||||
1 | 1 | 1 | 0 | 1 | 1 | 0 | 1 | ED |
0 | 1 | dd | 0 | 0 | 1 | 0 |
Register | r |
---|---|
B | 000 |
C | 001 |
D | 010 |
E | 011 |
H | 100 |
L | 101 |
A | 111 |
Value | dd |
---|---|
00 | BC |
01 | DE |
10 | HL |
11 | SP |
Flags |
| ||||||||
---|---|---|---|---|---|---|---|---|---|
s | set if result negative | ||||||||
z | set if result is 0 | ||||||||
h | set if borrow from bit 4 | ||||||||
p/v | set if overflow | ||||||||
c | set if borrow |
A | B | C | D | E | H | L | (HL) | (IX+d) | (IY+d) | n | BC | DE | HL | SP | |
---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
A |
SBC A,A
9F14 |
SBC A,B
9814 |
SBC A,C
9914 |
SBC A,D
9A14 |
SBC A,E
9B14 |
SBC A,H
9C14 |
SBC A,L
9D14 |
SBC A,(HL)
9E17 |
SBC A,(IX+d)
DD9Enn119 |
SBC A,(IY+d)
FD9Enn119 |
SBC A,n
DEnn27 |
|
|
|
|
HL |
|
|
|
|
|
|
|
|
|
|
|
SBC HL,BC
ED42215 |
SBC HL,DE
ED52215 |
SBC HL,HL
ED62215 |
SBC HL,SP
ED72215 |
Instruction
Opcode hexSize bytesCycle count
| Register | Memory | Implicit |
\(A \longleftarrow A \land s\)
7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 | |
---|---|---|---|---|---|---|---|---|
AND r | ||||||||
1 | 0 | 1 | 0 | 0 | r | |||
AND n | ||||||||
1 | 1 | 1 | 0 | 0 | 1 | 1 | 0 | E6 |
n | ||||||||
AND(HL) | ||||||||
1 | 0 | 1 | 0 | 0 | 1 | 1 | 0 | A6 |
AND (IX+d) | ||||||||
1 | 1 | 0 | 1 | 1 | 1 | 0 | 1 | DD |
1 | 0 | 1 | 0 | 0 | 1 | 1 | 0 | A6 |
d | ||||||||
AND (IY+d) | ||||||||
1 | 1 | 1 | 1 | 1 | 1 | 0 | 1 | FD |
1 | 0 | 1 | 0 | 0 | 1 | 1 | 0 | A6 |
d |
Register | r |
---|---|
B | 000 |
C | 001 |
D | 010 |
E | 011 |
H | 100 |
L | 101 |
A | 111 |
Flags |
| ||||||||
---|---|---|---|---|---|---|---|---|---|
s | set if result negative | ||||||||
z | set if result is 0 | ||||||||
h | set | ||||||||
p/v | set if overflow | ||||||||
c | reset |
A | B | C | D | E | H | L | (HL) | (IX+d) | (IY+d) | n | |
---|---|---|---|---|---|---|---|---|---|---|---|
A |
AND A,A
A714 |
AND A,B
A014 |
AND A,C
A114 |
AND A,D
A214 |
AND A,E
A314 |
AND A,H
A414 |
AND A,L
A514 |
AND A,(HL)
A617 |
AND A,(IX+d)
DDA6nn319 |
AND A,(IY+d)
FDA6nn319 |
AND A,n
E6nn27 |
Instruction
Opcode hexSize bytesCycle count
| Register | Memory | Implicit |
\(A \longleftarrow A \lor s\)
7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 | |
---|---|---|---|---|---|---|---|---|
OR r | ||||||||
1 | 0 | 1 | 1 | 0 | r | |||
OR n | ||||||||
1 | 1 | 1 | 1 | 0 | 1 | 1 | 0 | F6 |
n | ||||||||
OR (HL) | ||||||||
1 | 0 | 1 | 1 | 0 | 1 | 1 | 0 | B6 |
OR (IX+d) | ||||||||
1 | 1 | 0 | 1 | 1 | 1 | 0 | 1 | DD |
1 | 0 | 1 | 1 | 0 | 1 | 1 | 0 | B6 |
d | ||||||||
OR (IY+d) | ||||||||
1 | 1 | 1 | 1 | 1 | 1 | 0 | 1 | FD |
1 | 0 | 1 | 1 | 0 | 1 | 1 | 0 | B6 |
d |
Register | r |
---|---|
B | 000 |
C | 001 |
D | 010 |
E | 011 |
H | 100 |
L | 101 |
A | 111 |
Flags |
| ||||||||
---|---|---|---|---|---|---|---|---|---|
s | set if result negative | ||||||||
z | set if result is 0 | ||||||||
h | reset | ||||||||
p/v | set if overflow | ||||||||
c | reset |
A | B | C | D | E | H | L | (HL) | (IX+d) | (IY+d) | n | |
---|---|---|---|---|---|---|---|---|---|---|---|
A |
OR A,A
B714 |
OR A,B
B014 |
OR A,C
B114 |
OR A,D
B214 |
OR A,E
B314 |
OR A,H
B414 |
OR A,L
B514 |
OR A,(HL)
B617 |
OR A,(IX+d)
DDB6nn319 |
OR A,(IY+d)
FDB6nn319 |
OR A,n
F6nn27 |
Instruction
Opcode hexSize bytesCycle count
| Register | Memory | Implicit |
\(A \longleftarrow A \oplus s\)
7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 | |
---|---|---|---|---|---|---|---|---|
XOR r | ||||||||
1 | 0 | 1 | 0 | 1 | r | |||
XOR n | ||||||||
1 | 1 | 1 | 0 | 1 | 1 | 1 | 0 | EE |
n | ||||||||
XOR (HL) | ||||||||
1 | 0 | 1 | 0 | 1 | 1 | 1 | 0 | AE |
XOR (IX+d) | ||||||||
1 | 1 | 0 | 1 | 1 | 1 | 0 | 1 | DD |
1 | 0 | 1 | 0 | 1 | 1 | 1 | 0 | AE |
d | ||||||||
XOR (IY+d) | ||||||||
1 | 1 | 1 | 1 | 1 | 1 | 0 | 1 | FD |
1 | 0 | 1 | 0 | 1 | 1 | 1 | 0 | AE |
d |
Register | r |
---|---|
B | 000 |
C | 001 |
D | 010 |
E | 011 |
H | 100 |
L | 101 |
A | 111 |
Flags |
| ||||||||
---|---|---|---|---|---|---|---|---|---|
s | set if result negative | ||||||||
z | set if result is 0 | ||||||||
h | reset | ||||||||
p/v | set if overflow | ||||||||
c | reset |
A | B | C | D | E | H | L | (HL) | (IX+d) | (IY+d) | n | |
---|---|---|---|---|---|---|---|---|---|---|---|
A |
XOR A,A
AF14 |
XOR A,B
A814 |
XOR A,C
A914 |
XOR A,D
AA14 |
XOR A,E
AB14 |
XOR A,H
AC14 |
XOR A,L
AD14 |
XOR A,(HL)
AE17 |
XOR A,(IX+d)
DDAEnn319 |
XOR A,(IY+d)
FDAEnn319 |
XOR A,n
EEnn27 |
Instruction
Opcode hexSize bytesCycle count
| Register | Memory | Implicit |
INC increments either an 8-bit register or an 16-bit register pair.
7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 | |
---|---|---|---|---|---|---|---|---|
\(s \longleftarrow r + 1\) | ||||||||
INC r | ||||||||
0 | 0 | r | 1 | 0 | 0 | |||
\((HL) \longleftarrow (HL) + 1\) | ||||||||
INC (HL) | ||||||||
0 | 0 | 1 | 1 | 0 | 1 | 0 | 0 | 34 |
\((IX+d) \longleftarrow (IX+d) + 1\) | ||||||||
INC (IX+d) | ||||||||
1 | 1 | 0 | 1 | 1 | 1 | 0 | 1 | DD |
0 | 0 | 1 | 1 | 0 | 1 | 0 | 0 | 34 |
d | ||||||||
\((IY+d) \longleftarrow (IY+d) + 1\) | ||||||||
INC (IY+d) | ||||||||
1 | 1 | 1 | 1 | 1 | 1 | 0 | 1 | FD |
0 | 0 | 1 | 1 | 0 | 1 | 0 | 0 | 34 |
d |
Register | r |
---|---|
B | 000 |
C | 001 |
D | 010 |
E | 011 |
H | 100 |
L | 101 |
A | 111 |
Flags |
| ||||||||
---|---|---|---|---|---|---|---|---|---|
s | set if result negative | ||||||||
z | set if result is 0 | ||||||||
h | set if carry from bit 3 | ||||||||
p/v | set if register was 0x7F before operation, reset otherwise |
A | B | C | D | E | H | L | (HL) | (IX+d) | (IY+d) | |
---|---|---|---|---|---|---|---|---|---|---|
Op |
INC A
3C14 |
INC B
0414 |
INC C
0C14 |
INC D
1414 |
INC E
1C14 |
INC H
2414 |
INC L
2C14 |
INC (HL)
34111 |
INC (IX+d)
DD34nn323 |
INC (IY+d)
FD34nn323 |
Instruction
Opcode hexSize bytesCycle count
| Register | Memory |
7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 | |
---|---|---|---|---|---|---|---|---|
\(dd \longleftarrow dd + 1\) | ||||||||
INC qq | ||||||||
0 | 0 | dd | 0 | 0 | 1 | 1 | ||
\(IX \longleftarrow IX + 1\) | ||||||||
INC IX | ||||||||
1 | 1 | 0 | 1 | 1 | 1 | 0 | 1 | DD |
0 | 0 | 1 | 0 | 0 | 0 | 1 | 1 | 23 |
\(IY \longleftarrow IY + 1\) | ||||||||
INC IY | ||||||||
1 | 1 | 1 | 1 | 1 | 1 | 0 | 1 | FD |
0 | 0 | 1 | 0 | 0 | 0 | 1 | 1 | 23 |
Value | dd |
---|---|
00 | BC |
01 | DE |
10 | HL |
11 | SP |
None. |
BC | DE | HL | SP | IX | IY | |
---|---|---|---|---|---|---|
Op |
INC BC
0316 |
INC DE
1316 |
INC HL
2316 |
INC SP
3316 |
INC IX
DD23210 |
INC IY
FD23210 |
Instruction
Opcode hexSize bytesCycle count
| Register |
DEC decrements either an 8-bit register or an 16-bit register pair.
7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 | |
---|---|---|---|---|---|---|---|---|
\(r \longleftarrow r - 1\) | ||||||||
DEC r | ||||||||
0 | 0 | r | 1 | 0 | 1 | |||
\((HL) \longleftarrow (HL) - 1\) | ||||||||
DEC (HL) | ||||||||
0 | 0 | 1 | 1 | 0 | 1 | 0 | 1 | |
\((IX+d) \longleftarrow (IX+d) - 1\) | ||||||||
DEC (IX+d) | ||||||||
1 | 1 | 0 | 1 | 1 | 1 | 0 | 1 | DD |
0 | 0 | 1 | 1 | 0 | 1 | 0 | 1 | 35 |
d | ||||||||
\((IY+d) \longleftarrow (IY+d) - 1\) | ||||||||
DEC (IY+d) | ||||||||
1 | 1 | 1 | 1 | 1 | 1 | 0 | 1 | FD |
0 | 0 | 1 | 1 | 0 | 1 | 0 | 1 | 35 |
d |
Register | r |
---|---|
B | 000 |
C | 001 |
D | 010 |
E | 011 |
H | 100 |
L | 101 |
A | 111 |
Flags |
| ||||||||
---|---|---|---|---|---|---|---|---|---|
s | set if result negative | ||||||||
z | set if result is 0 | ||||||||
h | set if borrow from bit 4 | ||||||||
p/v | set if register was 0x80 before operation, reset otherwise |
A | B | C | D | E | H | L | (HL) | (IX+d) | (IY+d) | |
---|---|---|---|---|---|---|---|---|---|---|
Op |
DEC A
3D14 |
DEC B
0514 |
DEC C
0D14 |
DEC D
1514 |
DEC E
1D14 |
DEC H
2514 |
DEC L
2D14 |
DEC (HL)
35111 |
DEC (IX+d)
DD35nn323 |
DEC (IY+d)
FD35nn323 |
Instruction
Opcode hexSize bytesCycle count
| Register | Memory |
7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 | |
---|---|---|---|---|---|---|---|---|
\(dd \longleftarrow dd - 1\) | ||||||||
DEC dd | ||||||||
0 | 0 | dd | 1 | 0 | 1 | 1 | ||
\(IX \longleftarrow IX - 1\) | ||||||||
DEC IX | ||||||||
1 | 1 | 0 | 1 | 1 | 1 | 0 | 1 | DD |
0 | 0 | 1 | 0 | 1 | 0 | 1 | 1 | 2B |
\(IY \longleftarrow IY - 1\) | ||||||||
DEC IY | ||||||||
1 | 1 | 1 | 1 | 1 | 1 | 0 | 1 | FD |
0 | 0 | 1 | 0 | 1 | 0 | 1 | 1 | 2B |
Value | dd |
---|---|
00 | BC |
01 | DE |
10 | HL |
11 | SP |
None. |
BC | DE | HL | SP | IX | IY | |
---|---|---|---|---|---|---|
Op |
DEC BC
0B16 |
DEC DE
1B16 |
DEC HL
2B16 |
DEC SP
3B16 |
DEC IX
DD2B210 |
DEC IY
FD2B210 |
Instruction
Opcode hexSize bytesCycle count
| Register |
\(A - s\)
7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 | |
---|---|---|---|---|---|---|---|---|
CP r | ||||||||
1 | 0 | 1 | 1 | 1 | r | |||
CP n | ||||||||
1 | 1 | 1 | 1 | 1 | 1 | 1 | 0 | FE |
n | ||||||||
CP (HL) | ||||||||
1 | 0 | 1 | 1 | 1 | 1 | 1 | 0 | BE |
CP (IX+d) | ||||||||
1 | 1 | 0 | 1 | 1 | 1 | 0 | 1 | DD |
1 | 0 | 1 | 1 | 1 | 1 | 1 | 0 | BE |
d | ||||||||
CP (IY+d) | ||||||||
1 | 1 | 1 | 1 | 1 | 1 | 0 | 1 | FD |
1 | 0 | 1 | 1 | 1 | 1 | 1 | 0 | BE |
d |
Register | r |
---|---|
B | 000 |
C | 001 |
D | 010 |
E | 011 |
H | 100 |
L | 101 |
A | 111 |
Flags |
| ||||||||
---|---|---|---|---|---|---|---|---|---|
s | set if result negative | ||||||||
z | set if result is 0 | ||||||||
h | set if borrow from bit 4 | ||||||||
p/v | set if overflow | ||||||||
c | set if borrow |
A | B | C | D | E | H | L | (HL) | (IX+d) | (IY+d) | n | |
---|---|---|---|---|---|---|---|---|---|---|---|
Op |
CP A
BF14 |
CP B
B814 |
CP C
B914 |
CP D
BA14 |
CP E
BB14 |
CP H
BC14 |
CP L
BD14 |
CP (HL)
BE17 |
CP (IX+d)
DDBEnn319 |
CP (IY+d)
FDBEnn319 |
CP n
FEnn27 |
Instruction
Opcode hexSize bytesCycle count
| Register | Memory | Implicit |