| 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 | |
|---|---|---|---|---|---|---|---|---|
| RLCA | ||||||||
| 0 | 0 | 0 | 0 | 0 | 1 | 1 | 1 | 07 |
| RLC r | ||||||||
| 1 | 1 | 0 | 0 | 1 | 0 | 1 | 1 | CB |
| 0 | 0 | 0 | 0 | 0 | r | |||
| RLC (HL) | ||||||||
| 1 | 1 | 0 | 0 | 1 | 0 | 1 | 1 | CB |
| 0 | 0 | 0 | 0 | 0 | 1 | 1 | 0 | 06 |
| RLC (IX+d) | ||||||||
| 1 | 1 | 0 | 1 | 1 | 1 | 0 | 1 | DD |
| 1 | 1 | 0 | 0 | 1 | 0 | 1 | 1 | CB |
| d | ||||||||
| 0 | 0 | 0 | 0 | 0 | 1 | 1 | 0 | 06 |
| RLC (IY+d) | ||||||||
| 1 | 1 | 1 | 1 | 1 | 1 | 0 | 1 | FD |
| 1 | 1 | 0 | 0 | 1 | 0 | 1 | 1 | CB |
| d | ||||||||
| 0 | 0 | 0 | 0 | 0 | 1 | 1 | 0 | 06 |
| Register | r |
|---|---|
| B | 000 |
| C | 001 |
| D | 010 |
| E | 011 |
| H | 100 |
| L | 101 |
| A | 111 |
Flags Affected
| Flags |
| ||||||||
|---|---|---|---|---|---|---|---|---|---|
| s | set if result negative | ||||||||
| z | set if result is 0 | ||||||||
| h | reset | ||||||||
| p/v | set if parity even, reset if parity odd | ||||||||
| c | data from bit 7 of source register |
Opcode Matrix
| A | B | C | D | E | H | L | (HL) | (IX+d) | (IY+d) | |
|---|---|---|---|---|---|---|---|---|---|---|
| RLC |
RLCA
0714 |
|
|
|
|
|
|
|
|
|
| RLC |
RLC A
CB0728 |
RLC B
CB0028 |
RLC C
CB0128 |
RLC D
CB0228 |
RLC E
CB0328 |
RLC H
CB0428 |
RLC L
CB0528 |
RLC (HL)
CB0628 |
RLC (IX+d)
DDCBnn06423 |
RLC (IY+d)
FDCBnn06423 |
|
Instruction
Opcode hexSize bytesCycle count
| Register | Memory |