Similar to the RES
and SET
instructions, there are undocumented instructions for
BIT
.
Unlike the other, as BIT only tests a bit and does not change anything, these opcodes have the same behaviour to
the officially documented BIT instruction.
7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 | |
---|---|---|---|---|---|---|---|---|
\(Z \longleftarrow \overline{(IX+d)_b}\) | ||||||||
BIT b, (IX+d) | ||||||||
1 | 1 | 0 | 1 | 1 | 1 | 0 | 1 | DD |
1 | 1 | 0 | 0 | 1 | 0 | 1 | 1 | CB |
d | ||||||||
0 | 1 | b | r | |||||
\(Z \longleftarrow \overline{(IY+d)_b}\) | ||||||||
BIT b, (IY+d) | ||||||||
1 | 1 | 1 | 1 | 1 | 1 | 0 | 1 | FD |
1 | 1 | 0 | 0 | 1 | 0 | 1 | 1 | CB |
d | ||||||||
0 | 1 | b | r |
Register | r |
---|---|
B | 000 |
C | 001 |
D | 010 |
E | 011 |
H | 100 |
L | 101 |
A | 111 |
Value | b | |
---|---|---|
0 | 000 | |
1 | 001 | |
2 | 010 | |
3 | 011 | |
4 | 100 | |
5 | 101 | |
6 | 110 | |
7 | 111 |
Z is set if the specified bit in the source is 0, otherwise it is cleared.
r=%110 does exist, it is the official, documented operation.