This instruction performs an SLA (IX+dd)
or SLA (IX+dd)
operation but then also stores
the result in a register as well as in the memory location.
7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 | |
---|---|---|---|---|---|---|---|---|
SLA r,(IX+d) | ||||||||
1 | 1 | 0 | 1 | 1 | 1 | 0 | 1 | DD |
1 | 1 | 0 | 0 | 1 | 0 | 1 | 1 | CB |
d | ||||||||
0 | 0 | 1 | 0 | 0 | r | |||
SLA r,(IY+d) | ||||||||
1 | 1 | 1 | 1 | 1 | 1 | 0 | 1 | FD |
1 | 1 | 0 | 0 | 1 | 0 | 1 | 1 | CB |
d | ||||||||
0 | 0 | 1 | 0 | 0 | r |
Register | r |
---|---|
B | 000 |
C | 001 |
D | 010 |
E | 011 |
H | 100 |
L | 101 |
A | 111 |
Note: r=%110 does exist. It doesn't do a copy into a register as it's the existing official, documented instruction.
Opcode Matrix
A | B | C | D | E | H | L | |
---|---|---|---|---|---|---|---|
(IX+d) |
SLA A,(IX+d)
DDCBnn27 |
SLA B,(IX+d)
DDCBnn20 |
SLA C,(IX+d)
DDCBnn21 |
SLA D,(IX+d)
DDCBnn22 |
SLA E,(IX+d)
DDCBnn23 |
SLA H,(IX+d)
DDCBnn24 |
SLA L,(IX+d)
DDCBnn25 |
(IY+d) |
SLA A,(IY+d)
FDCBnn27 |
SLA B,(IY+d)
FDCBnn20 |
SLA C,(IY+d)
FDCBnn21 |
SLA D,(IY+d)
FDCBnn22 |
SLA E,(IY+d)
FDCBnn23 |
SLA H,(IY+d)
FDCBnn24 |
SLA L,(IY+d)
FDCBnn25 |
Instruction
Opcode hex
| Undocumented |