This instruction performs an SRL (IX+dd) or SRL (IX+dd) operation but then also stores
the result in a register as well as in the memory location.
| 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 | |
|---|---|---|---|---|---|---|---|---|
| SRL r,(IX+d) | ||||||||
| 1 | 1 | 0 | 1 | 1 | 1 | 0 | 1 | DD |
| 1 | 1 | 0 | 0 | 1 | 0 | 1 | 1 | CB |
| d | ||||||||
| 0 | 0 | 1 | 1 | 1 | r | |||
| SRL r,(IY+d) | ||||||||
| 1 | 1 | 1 | 1 | 1 | 1 | 0 | 1 | FD |
| 1 | 1 | 0 | 0 | 1 | 0 | 1 | 1 | CB |
| d | ||||||||
| 0 | 0 | 1 | 1 | 1 | r | |||
| Register | r |
|---|---|
| B | 000 |
| C | 001 |
| D | 010 |
| E | 011 |
| H | 100 |
| L | 101 |
| A | 111 |
Note: r=%110 does exist. It doesn't do a copy into a register as it's the existing official, documented instruction.
Opcode Matrix
| A | B | C | D | E | H | L | |
|---|---|---|---|---|---|---|---|
| (IX+d) |
SRL A,(IX+d)
DDCBnn3F |
SRL B,(IX+d)
DDCBnn38 |
SRL C,(IX+d)
DDCBnn39 |
SRL D,(IX+d)
DDCBnn3A |
SRL E,(IX+d)
DDCBnn3B |
SRL H,(IX+d)
DDCBnn3C |
SRL L,(IX+d)
DDCBnn3D |
| (IY+d) |
SRL A,(IY+d)
FDCBnn3F |
SRL B,(IY+d)
FDCBnn38 |
SRL C,(IY+d)
FDCBnn39 |
SRL D,(IY+d)
FDCBnn3A |
SRL E,(IY+d)
FDCBnn3B |
SRL H,(IY+d)
FDCBnn3C |
SRL L,(IY+d)
FDCBnn3D |
|
Instruction
Opcode hex
| Undocumented |