1 - 68000 Microprocessor

2 - MC68302 Integrated Multiprotocol Processor

The MC68302 Integrated Multiprotocol Processor (IMP) consists of an M68000 microprocessor core and a communications processor.

The features of the IMP are as follows:

• On-Chip HCMOS MC68000/MC68008 Core Supporting a 16- or 8-Bit M68000 Family System
• IB Including:
  • Independent Direct Memory Access (IDMA) Controller with Three Handshake Signals: DREQ, DACK, and DONE
  • Interrupt Controller with Two Modes of Operation
  • Parallel Input/Output (I/O) Ports, Some with Interrupt Capability
  • On-Chip 1152-Byte Dual-Port RAM
  • Three Timers Including a Watchdog Timer
  • Four Programmable Chip-Select Lines with Wait-State Generator Logic
  • Programmable Address Mapping of the Dual-Port RAM and IMP Registers
  • On-Chip Clock Generator with Output Signal
  • System Control:
    • Bus Arbitration Logic with Low-Interrupt Latency Support
    • System Status and Control Logic
    • Disable CPU Logic (M68000)
    • Hardware Watchdog
    • Low-Power (Standby) Modes
    • Freeze Control for Debugging
    • DRAM Refresh Controller
• CP Including:
  • Main Controller (RISC Processor)
  • Three Independent Full-Duplex Serial Communications Controllers (SCCs)
  • Supporting Various Protocols:
    • High-Level/Synchronous Data Link Control (HDLC/SDLC)
    • Universal Asynchronous Receiver Transmitter (UART)
    • Binary Synchronous Communication (BISYNC)
    • Synchronous/Asynchronous Digital Data Communications Message Protocol (DDCMP)
    • Transparent Modes
    • V.110 Rate Adaption
  • Six Serial DMA Channels for the Three SCCs
  • Flexible Physical Interface Accessible by SCCs Including:
    • Motorola Interchip Digital Link (IDL)
    • General Circuit Interface (GCI, also known as IOM³-2)
    • Pulse Code Modulation (PCM) Highway Interface
    • Nonmultiplexed Serial Interface (NMSI) Implementing Standard Modem Signals
  • SCP for Synchronous Communication
  • Two Serial Management Controllers (SMCs) To Support IDL and GCI Auxiliary Channels

16/8 bit operation

The MC68302 can operate either in the full MC68000 mode with a 16-bit data bus or in the MC68008 mode with an 8-bit data bus by tying the bus width (BUSW) pin low.

UDS/A₀ functions as A₀ and LDS/DS functions as DS in the MC68008 mode.

Pin Layouts