The 74240 provides Octal Buffers and Line Drivers With 3-State Outputs.
They are organized as two 4-bit buffers and drivers with separate output-enable (G) inputs. When G is low, the device passes data from the A inputs to the Y outputs. When G is high, the outputs are in the high impedance state. Inputs can be driven from either 3.3-V or 5-V devices. This feature allows the use of this device as a translator in a mixed 3.3-V and 5-V system environment. To ensure the high-impedance state during power up or power down, G must be tied to VCC through a pullup resistor; the minimum value of the resistor is determined by the current-sinking capability of the driver.
Inputs | Output | |
---|---|---|
G | An | Yn |
L | L | H |
L | H | L |
H | L | Z |
H | H | Z |
Pin | I/O | Description | |
---|---|---|---|
No | Name | ||
1 | 1G | I | Channel 1 output enable |
2 | 1A1 | I | Channel 1 A side 1 |
3 | 2Y4 | O | Channel 2 Y side 4 |
4 | 1A2 | I | Channel 1 A side 2 |
5 | 2Y3 | O | Channel 2 Y side 3 |
6 | 1A3 | I | Channel 1 A side 3 |
7 | 2Y2 | O | Channel 2 Y side 2 |
8 | 1A4 | I | Channel 1 A side 4 |
9 | 2Y1 | O | Channel 2 Y side 1 |
10 | GND | Ground | |
11 | 2A1 | I | Channel 2 A side 1 |
12 | 1Y4 | O | Channel 1 Y side 4 |
13 | 2A2 | I | Channel 2 A side 2 |
14 | 1Y3 | O | Channel 1 Y side 3 |
15 | 2A3 | I | Channel 2 A side 3 |
16 | 1Y2 | O | Channel 1 Y side 2 |
17 | 2A4 | I | Channel 2 A side 4 |
18 | 1Y1 | O | Channel 1 Y side 1 |
19 | 2G | I | Channel 2 Output Enable |
20 | VCC | Power supply |