This the multi-page printable view of this section.Click here to print.
These devices contain 4 independent 2-input NAND gates. The open-collector outputs require pull-up resistors to perform correctly. They may be connected to other open-collector outputs to implement active-low wired-OR or active-high wired-AND functions. Open-collector devices are often used to generate higher VOH levels.
The TI SN5401 & SN54LS01 operate over the full military temperature range of -55°C to 125°C. The SN7401 & SN74LS01 operate over 0°C to 70°C.
Inputs | Output | |
---|---|---|
An | Bn | Yn |
H | H | L |
L | H | H |
H | L | H |
L | L | H |
Absolute max ratings over operating free-air temperature range | |||
---|---|---|---|
Supply Voltage | VCC | '01 & 'LS01 | 7V |
Input voltage | '01 | 5.5V | |
'LS01 | 7V | ||
Off-state output voltage | 7V | ||
Operating free-air temperature range | SN54' | -55°C to 125°C | |
SN74' | 0°C to 70°C |
These devices contain 6 hex inverters.
The TI SN5404 & SN54LS04 operate over the full military temperature range of -55°C to 125°C. The SN7404 & SN74LS04 operate over 0°C to 70°C.
Input | Output |
---|---|
An | Yn |
H | L |
L | H |
These devices contain 6 hex inverters.
The TI SN5405 & SN54LS05 operate over the full military temperature range of -55°C to 125°C. The SN7405 & SN74LS05 operate over 0°C to 70°C.
Input | Output |
---|---|
An | Yn |
H | L |
L | H |
These devices contain 6 hex inverters with High-Voltage Open Collectors. The outputs are rated at 30V.
The TI SN5405 & SN54LS05 operate over the full military temperature range of -55°C to 125°C. The SN7405 & SN74LS05 operate over 0°C to 70°C.
Input | Output |
---|---|
An | Yn |
H | L |
L | H |
The 74240 provides Octal Buffers and Line Drivers With 3-State Outputs.
They are organized as two 4-bit buffers and drivers with separate output-enable (G) inputs. When G is low, the device passes data from the A inputs to the Y outputs. When G is high, the outputs are in the high impedance state. Inputs can be driven from either 3.3-V or 5-V devices. This feature allows the use of this device as a translator in a mixed 3.3-V and 5-V system environment. To ensure the high-impedance state during power up or power down, G must be tied to VCC through a pullup resistor; the minimum value of the resistor is determined by the current-sinking capability of the driver.
Inputs | Output | |
---|---|---|
G | An | Yn |
L | L | H |
L | H | L |
H | L | Z |
H | H | Z |
Pin | I/O | Description | |
---|---|---|---|
No | Name | ||
1 | 1G | I | Channel 1 output enable |
2 | 1A1 | I | Channel 1 A side 1 |
3 | 2Y4 | O | Channel 2 Y side 4 |
4 | 1A2 | I | Channel 1 A side 2 |
5 | 2Y3 | O | Channel 2 Y side 3 |
6 | 1A3 | I | Channel 1 A side 3 |
7 | 2Y2 | O | Channel 2 Y side 2 |
8 | 1A4 | I | Channel 1 A side 4 |
9 | 2Y1 | O | Channel 2 Y side 1 |
10 | GND | Ground | |
11 | 2A1 | I | Channel 2 A side 1 |
12 | 1Y4 | O | Channel 1 Y side 4 |
13 | 2A2 | I | Channel 2 A side 2 |
14 | 1Y3 | O | Channel 1 Y side 3 |
15 | 2A3 | I | Channel 2 A side 3 |
16 | 1Y2 | O | Channel 1 Y side 2 |
17 | 2A4 | I | Channel 2 A side 4 |
18 | 1Y1 | O | Channel 1 Y side 1 |
19 | 2G | I | Channel 2 Output Enable |
20 | VCC | Power supply |
The 74241 provides Octal Buffers and Line Drivers With 3-State Outputs.
They are organized as two 4-bit buffers and drivers with separate output-enable (G) inputs. When G is low, the device passes data from the A inputs to the Y outputs. When G is high, the outputs are in the high impedance state. Inputs can be driven from either 3.3-V or 5-V devices. This feature allows the use of this device as a translator in a mixed 3.3-V and 5-V system environment. To ensure the high-impedance state during power up or power down, G must be tied to VCC through a pullup resistor; the minimum value of the resistor is determined by the current-sinking capability of the driver.
Inputs | Output | |
---|---|---|
G | An | Yn |
L | L | L |
L | H | H |
H | L | Z |
H | H | Z |
Inputs | Output | |
---|---|---|
G | An | Yn |
H | L | H |
H | H | H |
L | L | Z |
L | H | Z |
Pin | I/O | Description | |
---|---|---|---|
No | Name | ||
1 | 1G | I | Channel 1 output enable |
2 | 1A1 | I | Channel 1 A side 1 |
3 | 2Y4 | O | Channel 2 Y side 4 |
4 | 1A2 | I | Channel 1 A side 2 |
5 | 2Y3 | O | Channel 2 Y side 3 |
6 | 1A3 | I | Channel 1 A side 3 |
7 | 2Y2 | O | Channel 2 Y side 2 |
8 | 1A4 | I | Channel 1 A side 4 |
9 | 2Y1 | O | Channel 2 Y side 1 |
10 | GND | Ground | |
11 | 2A1 | I | Channel 2 A side 1 |
12 | 1Y4 | O | Channel 1 Y side 4 |
13 | 2A2 | I | Channel 2 A side 2 |
14 | 1Y3 | O | Channel 1 Y side 3 |
15 | 2A3 | I | Channel 2 A side 3 |
16 | 1Y2 | O | Channel 1 Y side 2 |
17 | 2A4 | I | Channel 2 A side 4 |
18 | 1Y1 | O | Channel 1 Y side 1 |
19 | 2G | I | Channel 2 Output Enable |
20 | VCC | Power supply |
The 74244 provide Octal Buffers and Line Drivers With 3-State Outputs.
They are organized as two 4-bit buffers and drivers with separate output-enable (G) inputs. When G is low, the device passes data from the A inputs to the Y outputs. When G is high, the outputs are in the high impedance state. Inputs can be driven from either 3.3-V or 5-V devices. This feature allows the use of this device as a translator in a mixed 3.3-V and 5-V system environment. To ensure the high-impedance state during power up or power down, G must be tied to VCC through a pullup resistor; the minimum value of the resistor is determined by the current-sinking capability of the driver.
Inputs | Output | |
---|---|---|
G | An | Yn |
L | L | L |
L | H | H |
H | L | Z |
H | H | Z |
Pin | I/O | Description | |
---|---|---|---|
No | Name | ||
1 | 1G | I | Channel 1 output enable |
2 | 1A1 | I | Channel 1 A side 1 |
3 | 2Y4 | O | Channel 2 Y side 4 |
4 | 1A2 | I | Channel 1 A side 2 |
5 | 2Y3 | O | Channel 2 Y side 3 |
6 | 1A3 | I | Channel 1 A side 3 |
7 | 2Y2 | O | Channel 2 Y side 2 |
8 | 1A4 | I | Channel 1 A side 4 |
9 | 2Y1 | O | Channel 2 Y side 1 |
10 | GND | Ground | |
11 | 2A1 | I | Channel 2 A side 1 |
12 | 1Y4 | O | Channel 1 Y side 4 |
13 | 2A2 | I | Channel 2 A side 2 |
14 | 1Y3 | O | Channel 1 Y side 3 |
15 | 2A3 | I | Channel 2 A side 3 |
16 | 1Y2 | O | Channel 1 Y side 2 |
17 | 2A4 | I | Channel 2 A side 4 |
18 | 1Y1 | O | Channel 1 Y side 1 |
19 | 2G | I | Channel 2 Output Enable |
20 | VCC | Power supply |
Pin | I/O | Description | |
---|---|---|---|
No | Name | ||
1 | DIR | I | Control signal direction; High = Bx to Ax Low = Ax to Bx |
2 | A1 | I/O | Channel 1 A side |
3 | A2 | I/O | Channel 2 A side |
4 | A3 | I/O | Channel 3 A side |
5 | A4 | I/O | Channel 4 A side |
6 | A5 | I/O | Channel 5 A side |
7 | A6 | I/O | Channel 6 A side |
8 | A7 | I/O | Channel 7 A side |
9 | A8 | I/O | Channel 8 A side |
10 | GND | Ground | |
11 | B8 | I/O | Channel 8 B side |
12 | B7 | I/O | Channel 7 B side |
13 | B6 | I/O | Channel 6 B side |
14 | B5 | I/O | Channel 5 B side |
15 | B4 | I/O | Channel 4 B side |
16 | B3 | I/O | Channel 3 B side |
17 | B2 | I/O | Channel 2 B side |
18 | B1 | I/O | Channel 1 B side |
19 | OE | I |
Active low output enable; Low = all channels active, High = all channels disabled, high impedance |
20 | VCC | Power supply |