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Spectrum Memory Map Overview

Spectrum Memory Map

Table of Contents

1 Spectrum +2A/+3 Memory Map

2 Spectrum 128K/+2 Memory Map

3 Spectrum 48K Memory Map

4 Spectrum Basic Memory Map

The following table is an overview of the Spectrum Memory map for both 48K and 128K/+2 machines. The +2A and +3 are similar to the 128K but have additional ROM's and alternate all RAM memory layouts. The specifics for the individual machines are listed in their own sections.

Address	48K	128K / +2
0000	ROM	ROM 0 128K Editor				ROM 1 48K Editor
1000
2000
3000
4000	Screen	RAM Bank 5
5000	OS vars & free memory
6000
7000
8000	free memory	RAM Bank 2
9000
A000
B000
C000		RAM Bank 0	RAM Bank 1	RAM Bank 2	RAM Bank 3	RAM Bank 4	RAM Bank 5 Screen #1	RAM Bank 6	RAM Bank 7 Screen #2
D000
E000
F000

Memory Contention

Some memory is contended with the ULA, with the latter having priority whenever the screen is being updated. Time critical code needs to run in uncontended RAM.

On the 48K memory between 0x4000…0x7FFF is contended with the ULS whilst 0x8000…0xFFFF is not.

On the 128K and +2, odd numbered RAM banks are contended with the ULA. Time critical code should run in even numbered RAM banks.

1 - Spectrum +2A/+3 Memory Map

Spectrum +2A/+3 Memory Map

The memory of the +2A and +3 are similar to the 128K and +2. The main difference is that these models have four ROMs rather than two and additional memory configurations.

The memory is paged by writing to port 0x7FFD and port 0x1FFD. Port 0x7FFD is almost identical to the 128 except that ROM is now the lower bit.

Both of these ports are write only, so a copy is stored in ram at address 0x5B5C for 7FFD and 0x5B67 for port 1FFD.

Port	7	6	5	4	3	2	1	0	Ram Copy
1FFD				Printer Strobe	Disk Motor	1ROM		0	5B67
1FFD				Printer Strobe	Disk Motor	Memory Mode		1	5B67
7FFD			DIS	0ROM	SCR	RAM			5B5C

Bit 0 of port 0X1FFD selects the paging mode. If 0 then it's normal but 1 selects an alternate memory map.

Normal mode

RAM - The ram bank to page into 0xC000…0x7FFFF

ROM set selects the rom. It's split as 2 bits on each port with bit 0 from 7FFD bit 4 and bit 1 from 1FFD bit 2.

Rom ID	Rom Selected
0	128K editor, menu system and self test
1	128k syntax checker
2	+3DOS
3	48K Basic

The IDs are such that, if 128K code changes rom (as they don't know about the new register) then they would still get the correct rom as bit 0 is from the original port and bit1 would normally be clear at that point.

Special mode

In special mode, the RAM bits are ignored and bits 1 and 2 of port 0x1FFD control a memory map layout

Address	Mode 0	Mode 1	Mode 2	Mode 3
0000	Bank 0	Bank 4	Bank 4	Bank 4
4000	Bank 1	Bank 5 Screen #1	Bank 5 Screen #1	Bank 7 Screen #2
8000	Bank 2	Bank 6	Bank 6	Bank 6
C000	Bank 3	Bank 7 Screen #2	Bank 3	Bank 3

SCR set to 0 to display screen #1 in bank 5. Set to 1 to display screen #2 in bank 7.
DIS if set disables ram paging so that extra memory cannot be used in 48K mode. Once set it cannot be disabled until the machine is reset.
Disk Motor turns on/off the disk drive motor.
Printer Strobe controls the printer port

Plus 3

On the Plus 3 ram bankes 1, 3, 4 and 6 are used for the disk cache and RAM disk. Bank 7 contains the editor scratch pads and +3DOS workspace.

2 - Spectrum 128K/+2 Memory Map

Spectrum 128K/+2 Memory Map

The memory of the 128K and +2 is organised like below. Note the +2A and +3 are different.

0000 3FFF	ROM 0 128k Editor	ROM 1 48K Basic
4000 7FFF	Bank 5 Screen #1
8000 BFFF	Bank 2
C000 FFFF	Bank 0	Bank 1	Bank 2	Bank 3	Bank 4	Bank 5 Screen #1	Bank 6	Bank 7 Screen #2

RAM Banks 1, 3, 4 and 6 and most of 7 are used for the ram disk. The rest of bank 7 contains editor scratch pads.

The memory is paged by writing to port 0x7FFD.

This port is write only, so a copy is stored in ram at address 0x5B5C.

Port	7	6	5	4	3	2	1	0	Ram Copy
7FFD			DIS	ROM	SCR	RAM			5B5C

RAM - The ram bank to page into 0xC000…0x7FFFF
SCR set to 0 to display screen #1 in bank 5.^[3] Set to 1 to display screen #2 in bank 7.^[4]
ROM set selects the 48K Basic rom, clear the 128K editor.
DIS if set disables ram paging so that extra memory cannot be used in 48K mode. Once set it cannot be disabled until the machine is reset.

Typical bank switch on a 128:

LDA,(0x5B5C)Get previous port value
AND0xF8
OR4Select bank 4
LDBC,0x7FFDPort address
DIDisable interrupts
LD(0x5B5C),AUpdate memory copy of port
OUT(C),A
EIEnable interrupts

Notes:

Odd ram banks are contended with the ULA (even though it can only use banks 5 and 7).
Even banks are not contended so time critical code should run within those banks.
Bank 5 is always mapped at 4000 and Bank 2 at 8000 regardless of what bank is mapped at C000
Selecting the alternate screen in Bank 7 only tells the ULA to use it. It will not be placed at 4000

3 - Spectrum 48K Memory Map

Spectrum 48K Memory Map

Address	Content
0x0000	ROM
0x4000	Screen Memory								Contended RAM
0x5800	Screen Colour data
0x5B00	Printer buffer
0x5C00	System Variables
0x5CC0	Reserved
0x5CCB	Available Memory
0x8000									Un-Contended RAM
0xA000
0xC000
0xE000
0xFF58	Reserved
0xFFFF	Reserved

4 - Spectrum Basic Memory Map

Spectrum Basic Memory Map

The following table shows the memory map of the Spectrum as seen by BASIC.

Address	48K				128K
4000	Display File
5800	Display Attributes
5B00	Printer Buffer
5C00	System variables
5CB6 CHANS	Channel Information
PROG	0x80h
	Basic Program
VARS	Variables
	0x80h
	Command or program line being edited
	NL
	0x80h
WORKSP	INPUT data
	NL
	Temporary workspace
STKBOT	Calculator stack
STKEND	Calculator stack
	Spare
SP	Machine stack
	Gosub stack
RAMTOP	Gosub stack
	0x3E
UDG	User defined graphics
PRAMT	User defined graphics