ADC Add With Carry

Add With Carry
Tags:

Adds the data in the operand with the contents of the accumulator. Add 1 to the result if the carry flag is set. Store the final result in the accumulator.

Binary/Decimal mode

If the d flag is clear then binary addition is performed. If the d flag set then Binary Coded Decimal (BCD) addition is performed.

Data size

On all processors, the data added from memory is 8-bit. However, for 16-bit processors with the m flag is clear then the data added is 16-bit with the low-order 8-bits at the effective address and the high-order 8-bits at the effective address plus one.

Multi-precision arithmetic

In multi-precision (multi-word) arithmetic, the carry flag should be cleared before the low-order words are added. The addition will generate a new carry flag value based on that addition which will then be passed on to the next word.

For example, to add 1 to a 16-bit value at &70 on 8-bit processors: 

1  CLC      ; Clear carry before first addition
2  LDA &70  ; Add 1 to low-order byte
3  ADC #1
4  STA &70
5  LDA &71  ; Add 0 to high order byte
6  ADC #0   ; This will add 1 if carry was set
7  STA &71  ; in the low-order byte
Flags Affected
Flags
nv----zc
nSet if most-significant bit of result is set
vSet if signed overflow
zSet if result is zero
cSet if unsigned overflow, clear if valid unsigned result
Instructions
SyntaxOpcode Available on: # of # of Addressing Mode
(hex) 6502 65C02 65816 bytes cycles
ADC #const69 x x x 21 22, 5 Immediate
ADC addr6D x x x 3 42, 5 Absolute
ADC long6F x 4 52, 5 Absolute Long
ADC dp65 x x x 2 32, 3, 5 Direct Page
ADC (dp)72 x x 2 52, 3, 5 Direct Page Indirect
ADC [dp]67 x 2 62, 3, 5 Direct Page Indirect Long
ADC addr,X7D x x x 3 42, 4, 5 Absolute Indexed X
ADC long,X7F x 4 52, 5 Absolute Long Indexed X
ADC addr,Y79 x x x 3 42, 4, 5 Absolute Indexed Y
ADC dp,X75 x x x 2 42, 3, 5 Direct Page Indexed X
ADC (dp,X)61 x x x 2 62, 3, 5 Direct Page Indexed Indirect X
ADC (dp),Y71 x x x 2 52, 3, 4, 5 Direct Page Indirect Indexed Y
ADC [dp],Y77 x 2 62, 3, 5 Direct Page Indirect Long Indexed Y
ADC sr,S63 x 2 42, 5 Stack Relative
ADC (sr,S),Y73 x 2 72, 5 Stack Relative Indirect Indexed Y

Notes:

  1. 65816: Add 1 byte if m=0 (16-bit memory/accumulator)
  2. 65816: Add 1 cycle if m=0 (16-bit memory/accumulator)
  3. 65816: Add 1 cycle if low byte of Direct Page register is not 0
  4. Add 1 cycle if adding index crosses a page boundary
  5. 65C02: Add 1 cycle if d=1
Last modified November 5, 2021: Add instruction categories (6b74ff9)