LD A,I and LDA A,R
8-bit register instructions
| 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 | |
|---|---|---|---|---|---|---|---|---|
| \(A \longleftarrow I\) | ||||||||
| LD A, I | ||||||||
| 1 | 1 | 1 | 0 | 1 | 1 | 0 | 1 | ED |
| 0 | 1 | 0 | 1 | 0 | 1 | 1 | 1 | 57 |
| \(A \longleftarrow R\) | ||||||||
| LD A, R | ||||||||
| 1 | 1 | 1 | 0 | 1 | 1 | 0 | 1 | ED |
| 0 | 1 | 0 | 1 | 1 | 1 | 1 | 1 | 5F |
Flags Affected
| Flags |
| ||||||||
|---|---|---|---|---|---|---|---|---|---|
| s | Set if the source register is negative | ||||||||
| z | Set if the source register is 0 | ||||||||
| p/v | Contains contents of IFF2, 0 if an interrupt occurs during the instruction running |
Opcode Matrix
| I | R | |
|---|---|---|
| A |
LD A, I
ED5729 |
LD A, R
ED5F29 |
|
Instruction
Opcode hexSize bytesCycle count
| Special |
Last modified November 16, 2021: Split ADD up to allow flags to be defined (7fea8b1)