LD s, (nn)
Load register from memory
7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 | |
---|---|---|---|---|---|---|---|---|
\(A \longleftarrow (nn)\) | ||||||||
LD A, (nn) | ||||||||
0 | 0 | 1 | 1 | 1 | 0 | 1 | 0 | 3A |
7 | nn | 0 | ||||||
15 | 8 | |||||||
\(H \longleftarrow (nn+1), L \longleftarrow (nn)\) | ||||||||
LD HL, (nn) | ||||||||
0 | 0 | 1 | 0 | 1 | 0 | 1 | 0 | 2A |
7 | nn | 0 | ||||||
15 | 8 | |||||||
\(dd_h \longleftarrow (nn+1), dd_l \longleftarrow (nn)\) | ||||||||
LD dd, (nn) | ||||||||
1 | 1 | 1 | 0 | 1 | 1 | 0 | 1 | ED |
0 | 1 | dd | 1 | 0 | 1 | 1 | ||
7 | nn | 0 | ||||||
15 | 8 | |||||||
\(IX_h \longleftarrow (nn+1), IX_l \longleftarrow (nn)\) | ||||||||
LD IX, (nn) | ||||||||
1 | 1 | 0 | 1 | 1 | 1 | 0 | 1 | DD |
0 | 0 | 1 | 0 | 1 | 0 | 1 | 0 | 2A |
7 | nn | 0 | ||||||
15 | 8 | |||||||
\(IY_h \longleftarrow (nn+1), IY_l \longleftarrow (nn)\) | ||||||||
LD IY, (nn) | ||||||||
1 | 1 | 1 | 1 | 1 | 1 | 0 | 1 | FD |
0 | 0 | 1 | 0 | 1 | 0 | 1 | 0 | 2A |
7 | nn | 0 | ||||||
15 | 8 |
Value | dd |
---|---|
00 | BC |
01 | DE |
10 | HL |
11 | SP |
Flags Affected
None. |
Opcode Matrix
A | BC | DE | HL | IX | IY | SP | |
---|---|---|---|---|---|---|---|
(nn) |
LD A, (nn)
3Annnn313 |
|
|
LD HL, (nn)
2Annnn316 |
|
|
|
(nn) |
|
LD BC, (nn)
ED4Bnnnn420 |
LD DE, (nn)
ED5Bnnnn420 |
LD HL, (nn)
ED6Bnnnn420 |
LD IX, (nn)
DD2Annnn420 |
LD IY, (nn)
FD2Annnn420 |
LD SP, (nn)
ED7Bnnnn420 |
Instruction
Opcode hexSize bytesCycle count
| Memory |
Last modified November 16, 2021: Update flag rendering so it can be reused for the Z80 (06001ea)