SRL Rotate bits right with Carry
Rotate bits right with carry, bit 7 is reset
| 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 | |
|---|---|---|---|---|---|---|---|---|
| SRL r | ||||||||
| 1 | 1 | 0 | 0 | 1 | 0 | 1 | 1 | CB |
| 0 | 0 | 1 | 1 | 1 | r | |||
| SRL (HL) | ||||||||
| 1 | 1 | 0 | 0 | 1 | 0 | 1 | 1 | CB |
| 0 | 0 | 1 | 1 | 1 | 1 | 1 | 0 | 3E |
| SRL (IX+d) | ||||||||
| 1 | 1 | 0 | 1 | 1 | 1 | 0 | 1 | DD |
| 1 | 1 | 0 | 0 | 1 | 0 | 1 | 1 | CB |
| d | ||||||||
| 0 | 0 | 1 | 1 | 1 | 1 | 1 | 0 | 3E |
| SRL (IY+d) | ||||||||
| 1 | 1 | 1 | 1 | 1 | 1 | 0 | 1 | FD |
| 1 | 1 | 0 | 0 | 1 | 0 | 1 | 1 | CB |
| d | ||||||||
| 0 | 0 | 1 | 1 | 1 | 1 | 1 | 0 | 3E |
| Register | r |
|---|---|
| B | 000 |
| C | 001 |
| D | 010 |
| E | 011 |
| H | 100 |
| L | 101 |
| A | 111 |
Flags Affected
| Flags |
| ||||||||
|---|---|---|---|---|---|---|---|---|---|
| s | set if result negative | ||||||||
| z | set if result is 0 | ||||||||
| h | reset | ||||||||
| p/v | set if parity even, reset if parity odd | ||||||||
| c | data from bit 0 of source register |
Opcode Matrix
| A | B | C | D | E | H | L | (HL) | (IX+d) | (IY+d) | |
|---|---|---|---|---|---|---|---|---|---|---|
| SRL |
SRL A
CB3F28 |
SRL B
CB3828 |
SRL C
CB3928 |
SRL D
CB3A28 |
SRL E
CB3B28 |
SRL H
CB3C28 |
SRL L
CB3D28 |
SRL (HL)
CB3E215 |
SRL (IX+d)
DDCBnn3E423 |
SRL (IY+d)
FDCBnn3E423 |
|
Instruction
Opcode hexSize bytesCycle count
| Register | Memory |
Last modified November 16, 2021: Add flags to rot operations (2eee171)